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author | Subv <subv2112@gmail.com> | 2018-04-14 18:42:07 +0200 |
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committer | Subv <subv2112@gmail.com> | 2018-04-15 05:54:23 +0200 |
commit | ae58e46036944ebadfed611b657911720383d60f (patch) | |
tree | 951caf616779423ce11f1b260701492ceb07f187 | |
parent | Merge pull request #332 from bunnei/fix-total-mem-usage (diff) | |
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-rw-r--r-- | src/video_core/engines/maxwell_3d.cpp | 21 | ||||
-rw-r--r-- | src/video_core/engines/maxwell_3d.h | 3 | ||||
-rw-r--r-- | src/video_core/renderer_opengl/gl_rasterizer.cpp | 6 |
3 files changed, 27 insertions, 3 deletions
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index 2d7c3152f..98ed11ec5 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp @@ -301,5 +301,26 @@ u32 Maxwell3D::GetRegisterValue(u32 method) const { return regs.reg_array[method]; } +bool Maxwell3D::IsShaderStageEnabled(Regs::ShaderStage stage) const { + // The Vertex stage is always enabled. + if (stage == Regs::ShaderStage::Vertex) + return true; + + switch (stage) { + case Regs::ShaderStage::TesselationControl: + return regs.shader_config[static_cast<size_t>(Regs::ShaderProgram::TesselationControl)] + .enable != 0; + case Regs::ShaderStage::TesselationEval: + return regs.shader_config[static_cast<size_t>(Regs::ShaderProgram::TesselationEval)] + .enable != 0; + case Regs::ShaderStage::Geometry: + return regs.shader_config[static_cast<size_t>(Regs::ShaderProgram::Geometry)].enable != 0; + case Regs::ShaderStage::Fragment: + return regs.shader_config[static_cast<size_t>(Regs::ShaderProgram::Fragment)].enable != 0; + } + + UNREACHABLE(); +} + } // namespace Engines } // namespace Tegra diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 9c6236c39..1fae41cb2 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h @@ -518,6 +518,9 @@ public: /// Returns a list of enabled textures for the specified shader stage. std::vector<Texture::FullTextureInfo> GetStageTextures(Regs::ShaderStage stage) const; + /// Returns whether the specified shader stage is enabled or not. + bool IsShaderStageEnabled(Regs::ShaderStage stage) const; + private: std::unordered_map<u32, std::vector<u32>> uploaded_macros; diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp index f75d4c658..adc684f9e 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer.cpp +++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp @@ -191,8 +191,9 @@ void RasterizerOpenGL::SetupShaders(u8* buffer_ptr, GLintptr buffer_offset, size auto& shader_config = gpu.regs.shader_config[index]; const Maxwell::ShaderProgram program{static_cast<Maxwell::ShaderProgram>(index)}; - // VertexB program is always enabled, despite bit setting - const bool is_enabled{shader_config.enable || program == Maxwell::ShaderProgram::VertexB}; + const auto& stage = index - 1; // Stage indices are 0 - 5 + + const bool is_enabled = gpu.IsShaderStageEnabled(static_cast<Maxwell::ShaderStage>(stage)); // Skip stages that are not enabled if (!is_enabled) { @@ -200,7 +201,6 @@ void RasterizerOpenGL::SetupShaders(u8* buffer_ptr, GLintptr buffer_offset, size } // Upload uniform data as one UBO per stage - const auto& stage = index - 1; // Stage indices are 0 - 5 const GLintptr ubo_offset = buffer_offset + static_cast<GLintptr>(ptr_pos); copy_buffer(uniform_buffers[stage].handle, ubo_offset, sizeof(GLShader::MaxwellUniformData)); |