summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorbunnei <bunneidev@gmail.com>2018-06-09 05:25:22 +0200
committerbunnei <bunneidev@gmail.com>2018-06-09 05:25:22 +0200
commitbbc4f369edeab6c21a13fce6146b443445a62c48 (patch)
treeac8613849062fe64ed2e8ddd02dbedf5e381ecaa
parentgl_shader_decompiler: Add missing asserts for saturate_a instructions. (diff)
downloadyuzu-bbc4f369edeab6c21a13fce6146b443445a62c48.tar
yuzu-bbc4f369edeab6c21a13fce6146b443445a62c48.tar.gz
yuzu-bbc4f369edeab6c21a13fce6146b443445a62c48.tar.bz2
yuzu-bbc4f369edeab6c21a13fce6146b443445a62c48.tar.lz
yuzu-bbc4f369edeab6c21a13fce6146b443445a62c48.tar.xz
yuzu-bbc4f369edeab6c21a13fce6146b443445a62c48.tar.zst
yuzu-bbc4f369edeab6c21a13fce6146b443445a62c48.zip
-rw-r--r--src/video_core/engines/shader_bytecode.h16
-rw-r--r--src/video_core/renderer_opengl/gl_shader_decompiler.cpp32
2 files changed, 37 insertions, 11 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index bf254ef33..dc3dd8a80 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -264,7 +264,7 @@ union Instruction {
BitField<39, 5, u64> shift_amount;
BitField<48, 1, u64> negate_b;
BitField<49, 1, u64> negate_a;
- } iscadd;
+ } alu_integer;
union {
BitField<20, 8, u64> shift_position;
@@ -434,6 +434,9 @@ public:
FMUL_R,
FMUL_IMM,
FMUL32_IMM,
+ IADD_C,
+ IADD_R,
+ IADD_IMM,
ISCADD_C, // Scale and Add
ISCADD_R,
ISCADD_IMM,
@@ -489,10 +492,10 @@ public:
enum class Type {
Trivial,
Arithmetic,
+ ArithmeticInteger,
Bfe,
Logic,
Shift,
- ScaledAdd,
Ffma,
Flow,
Memory,
@@ -617,9 +620,12 @@ private:
INST("0101110001101---", Id::FMUL_R, Type::Arithmetic, "FMUL_R"),
INST("0011100-01101---", Id::FMUL_IMM, Type::Arithmetic, "FMUL_IMM"),
INST("00011110--------", Id::FMUL32_IMM, Type::Arithmetic, "FMUL32_IMM"),
- INST("0100110000011---", Id::ISCADD_C, Type::ScaledAdd, "ISCADD_C"),
- INST("0101110000011---", Id::ISCADD_R, Type::ScaledAdd, "ISCADD_R"),
- INST("0011100-00011---", Id::ISCADD_IMM, Type::ScaledAdd, "ISCADD_IMM"),
+ INST("0100110000010---", Id::IADD_C, Type::ArithmeticInteger, "IADD_C"),
+ INST("0101110000010---", Id::IADD_R, Type::ArithmeticInteger, "IADD_R"),
+ INST("0011100-00010---", Id::IADD_IMM, Type::ArithmeticInteger, "IADD_IMM"),
+ INST("0100110000011---", Id::ISCADD_C, Type::ArithmeticInteger, "ISCADD_C"),
+ INST("0101110000011---", Id::ISCADD_R, Type::ArithmeticInteger, "ISCADD_R"),
+ INST("0011100-00011---", Id::ISCADD_IMM, Type::ArithmeticInteger, "ISCADD_IMM"),
INST("0101000010000---", Id::MUFU, Type::Arithmetic, "MUFU"),
INST("0100110010010---", Id::RRO_C, Type::Arithmetic, "RRO_C"),
INST("0101110010010---", Id::RRO_R, Type::Arithmetic, "RRO_R"),
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
index 3abdd7fdb..4e248d328 100644
--- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
+++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
@@ -992,13 +992,13 @@ private:
break;
}
- case OpCode::Type::ScaledAdd: {
+ case OpCode::Type::ArithmeticInteger: {
std::string op_a = regs.GetRegisterAsInteger(instr.gpr8);
- if (instr.iscadd.negate_a)
+ if (instr.alu_integer.negate_a)
op_a = '-' + op_a;
- std::string op_b = instr.iscadd.negate_b ? "-" : "";
+ std::string op_b = instr.alu_integer.negate_b ? "-" : "";
if (instr.is_b_imm) {
op_b += '(' + std::to_string(instr.alu.GetSignedImm20_20()) + ')';
@@ -1011,10 +1011,30 @@ private:
}
}
- std::string shift = std::to_string(instr.iscadd.shift_amount.Value());
+ switch (opcode->GetId()) {
+ case OpCode::Id::IADD_C:
+ case OpCode::Id::IADD_R:
+ case OpCode::Id::IADD_IMM: {
+ ASSERT_MSG(!instr.saturate_a, "Unimplemented");
+ regs.SetRegisterToInteger(instr.gpr0, true, 0, op_a + " + " + op_b, 1, 1);
+ break;
+ }
+ case OpCode::Id::ISCADD_C:
+ case OpCode::Id::ISCADD_R:
+ case OpCode::Id::ISCADD_IMM: {
+ std::string shift = std::to_string(instr.alu_integer.shift_amount.Value());
+
+ regs.SetRegisterToInteger(instr.gpr0, true, 0,
+ "((" + op_a + " << " + shift + ") + " + op_b + ')', 1, 1);
+ break;
+ }
+ default: {
+ NGLOG_CRITICAL(HW_GPU, "Unhandled ArithmeticInteger instruction: {}",
+ opcode->GetName());
+ UNREACHABLE();
+ }
+ }
- regs.SetRegisterToInteger(instr.gpr0, true, 0,
- "((" + op_a + " << " + shift + ") + " + op_b + ')', 1, 1);
break;
}
case OpCode::Type::Ffma: {