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authorbunnei <bunneidev@gmail.com>2018-01-09 01:18:50 +0100
committerbunnei <bunneidev@gmail.com>2018-01-09 01:18:50 +0100
commitd6e4e6ea321aaf734198bffea5a3f976f5b4d23b (patch)
treeaf62d27a2c2403280aadfd95e8cdd026dc6595ef
parentCoreTiming: Reworked CoreTiming (cherry-picked from Citra #3119) (diff)
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-rw-r--r--src/core/core_timing.h8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/core/core_timing.h b/src/core/core_timing.h
index 46ddcd18b..b9eb38ea4 100644
--- a/src/core/core_timing.h
+++ b/src/core/core_timing.h
@@ -23,11 +23,9 @@
#include "common/common_types.h"
#include "common/logging/log.h"
-// The timing we get from the assembly is 268,111,855.956 Hz
-// It is possible that this number isn't just an integer because the compiler could have
-// optimized the multiplication by a multiply-by-constant division.
-// Rounding to the nearest integer should be fine
-constexpr u64 BASE_CLOCK_RATE = 383778816; // Switch clock speed is 384MHz docked
+// The below clock rate is based on Switch's clockspeed being widely known as 1.020GHz
+// The exact value used is of course unverified.
+constexpr u64 BASE_CLOCK_RATE = 1019215872; // Switch clock speed is 1020MHz un/docked
constexpr u64 MAX_VALUE_TO_MULTIPLY = std::numeric_limits<s64>::max() / BASE_CLOCK_RATE;
inline s64 msToCycles(int ms) {