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author | Fernando Sahmkow <fsahmkow27@gmail.com> | 2020-06-20 01:40:07 +0200 |
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committer | Fernando Sahmkow <fsahmkow27@gmail.com> | 2020-06-27 17:36:27 +0200 |
commit | 4105f38022a525aab2e7d4288f121b4f0a0dd7b2 (patch) | |
tree | 3cf68e47fcc17442111b8af16a3fff19b3f3434f /src/core/arm | |
parent | SVC: Add GetCurrentProcessorNumber32, CreateTransferMemory32, SetMemoryAttribute32 (diff) | |
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Diffstat (limited to 'src/core/arm')
-rw-r--r-- | src/core/arm/arm_interface.h | 5 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_32.cpp | 8 |
2 files changed, 9 insertions, 4 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index fbdce4134..0c1d6ac39 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h @@ -33,16 +33,15 @@ public: struct ThreadContext32 { std::array<u32, 16> cpu_registers{}; + std::array<u32, 64> extension_registers{}; u32 cpsr{}; - std::array<u8, 4> padding{}; - std::array<u64, 32> fprs{}; u32 fpscr{}; u32 fpexc{}; u32 tpidr{}; }; // Internally within the kernel, it expects the AArch32 version of the // thread context to be 344 bytes in size. - static_assert(sizeof(ThreadContext32) == 0x158); + static_assert(sizeof(ThreadContext32) == 0x150); struct ThreadContext64 { std::array<u64, 31> cpu_registers{}; diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index 5df4fc079..cfda12098 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -222,13 +222,17 @@ void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) { Dynarmic::A32::Context context; jit->SaveContext(context); ctx.cpu_registers = context.Regs(); + ctx.extension_registers = context.ExtRegs(); ctx.cpsr = context.Cpsr(); + ctx.fpscr = context.Fpscr(); } void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) { Dynarmic::A32::Context context; context.Regs() = ctx.cpu_registers; + context.ExtRegs() = ctx.extension_registers; context.SetCpsr(ctx.cpsr); + context.SetFpscr(ctx.fpscr); jit->LoadContext(context); } @@ -243,7 +247,9 @@ void ARM_Dynarmic_32::ClearInstructionCache() { jit->ClearCache(); } -void ARM_Dynarmic_32::ClearExclusiveState() {} +void ARM_Dynarmic_32::ClearExclusiveState() { + jit->ClearExclusiveState(); +} void ARM_Dynarmic_32::PageTableChanged(Common::PageTable& page_table, std::size_t new_address_space_size_in_bits) { |