summaryrefslogtreecommitdiffstats
path: root/src/core/arm
diff options
context:
space:
mode:
authorbunnei <ericbunnie@gmail.com>2014-05-07 03:34:00 +0200
committerbunnei <ericbunnie@gmail.com>2014-05-07 03:34:00 +0200
commitd1472b816fdd98a5e2cd2d414a23c133a9c3819d (patch)
tree0f8d9435520bfebb8015b08722f5af92b9b061bc /src/core/arm
parent- added better SVC logging (diff)
downloadyuzu-d1472b816fdd98a5e2cd2d414a23c133a9c3819d.tar
yuzu-d1472b816fdd98a5e2cd2d414a23c133a9c3819d.tar.gz
yuzu-d1472b816fdd98a5e2cd2d414a23c133a9c3819d.tar.bz2
yuzu-d1472b816fdd98a5e2cd2d414a23c133a9c3819d.tar.lz
yuzu-d1472b816fdd98a5e2cd2d414a23c133a9c3819d.tar.xz
yuzu-d1472b816fdd98a5e2cd2d414a23c133a9c3819d.tar.zst
yuzu-d1472b816fdd98a5e2cd2d414a23c133a9c3819d.zip
Diffstat (limited to 'src/core/arm')
-rw-r--r--src/core/arm/interpreter/armemu.cpp39
1 files changed, 22 insertions, 17 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp
index a35c5c8dc..1af684fe3 100644
--- a/src/core/arm/interpreter/armemu.cpp
+++ b/src/core/arm/interpreter/armemu.cpp
@@ -5536,14 +5536,15 @@ Handle_Load_Double (ARMul_State * state, ARMword instr)
addr = base;
/* The address must be aligned on a 8 byte boundary. */
- if (addr & 0x7) {
-#ifdef ABORTS
- ARMul_DATAABORT (addr);
-#else
- ARMul_UndefInstr (state, instr);
-#endif
- return;
- }
+ // FIX(Normatt): Disable strict alignment on LDRD/STRD
+// if (addr & 0x7) {
+//#ifdef ABORTS
+// ARMul_DATAABORT (addr);
+//#else
+// ARMul_UndefInstr (state, instr);
+//#endif
+// return;
+// }
/* For pre indexed or post indexed addressing modes,
check that the destination registers do not overlap
@@ -5640,14 +5641,15 @@ Handle_Store_Double (ARMul_State * state, ARMword instr)
addr = base;
/* The address must be aligned on a 8 byte boundary. */
- if (addr & 0x7) {
-#ifdef ABORTS
- ARMul_DATAABORT (addr);
-#else
- ARMul_UndefInstr (state, instr);
-#endif
- return;
- }
+ // FIX(Normatt): Disable strict alignment on LDRD/STRD
+// if (addr & 0x7) {
+//#ifdef ABORTS
+// ARMul_DATAABORT (addr);
+//#else
+// ARMul_UndefInstr (state, instr);
+//#endif
+// return;
+// }
/* For pre indexed or post indexed addressing modes,
check that the destination registers do not overlap
@@ -6405,6 +6407,8 @@ handle_v6_insn (ARMul_State * state, ARMword instr)
if (state->Aborted) {
TAKEABORT;
}
+ // FIX(Normmatt): Handle RD in STREX/STREXB
+ state->Reg[DESTReg] = 0; //Always succeed
return 1;
}
@@ -6432,7 +6436,8 @@ handle_v6_insn (ARMul_State * state, ARMword instr)
if (state->Aborted) {
TAKEABORT;
}
-
+ // FIX(Normmatt): Handle RD in STREX/STREXB
+ state->Reg[DESTReg] = 0; //Always succeed
//printf("In %s, strexb not implemented\n", __FUNCTION__);
UNDEF_LSRBPC;
/* WRITESDEST (dest); */