diff options
| author | bunnei <bunneidev@gmail.com> | 2014-12-19 22:46:36 +0100 |
|---|---|---|
| committer | bunnei <bunneidev@gmail.com> | 2014-12-19 22:46:36 +0100 |
| commit | dc5d1a9061425505dcaaf7b93a13876df7849621 (patch) | |
| tree | e6166c565114f971c7dd12d698380d788cc97f1a /src/core/arm | |
| parent | Merge pull request #302 from purpasmart96/flushshutup (diff) | |
| parent | armemu: Get rid of bitwise parenthesis warnings (diff) | |
| download | yuzu-dc5d1a9061425505dcaaf7b93a13876df7849621.tar yuzu-dc5d1a9061425505dcaaf7b93a13876df7849621.tar.gz yuzu-dc5d1a9061425505dcaaf7b93a13876df7849621.tar.bz2 yuzu-dc5d1a9061425505dcaaf7b93a13876df7849621.tar.lz yuzu-dc5d1a9061425505dcaaf7b93a13876df7849621.tar.xz yuzu-dc5d1a9061425505dcaaf7b93a13876df7849621.tar.zst yuzu-dc5d1a9061425505dcaaf7b93a13876df7849621.zip | |
Diffstat (limited to 'src/core/arm')
| -rw-r--r-- | src/core/arm/interpreter/armemu.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 07d205755..56040a4eb 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6109,7 +6109,7 @@ L_stm_s_takeabort: break; } - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF; + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF); if (Rm & 0x80) Rm |= 0xffffff00; @@ -6154,7 +6154,7 @@ L_stm_s_takeabort: if (ror == -1) break; - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF; + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF); if (Rm & 0x8000) Rm |= 0xffff0000; @@ -6250,7 +6250,7 @@ L_stm_s_takeabort: break; } - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF; + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF); if (BITS(16, 19) == 0xf) /* UXTB */ @@ -6294,7 +6294,7 @@ L_stm_s_takeabort: if (ror == -1) break; - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF; + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF); /* UXT */ /* state->Reg[BITS (12, 15)] = Rm; */ |