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| author | Lioncash <mathew1800@gmail.com> | 2015-05-31 10:42:39 +0200 |
|---|---|---|
| committer | Lioncash <mathew1800@gmail.com> | 2015-06-01 03:50:57 +0200 |
| commit | 7caef19c89662b5c80c4f1ea6d8862dcf7760b17 (patch) | |
| tree | 938e11bc04671106d94df56c8404c62acd694dcf /src/core | |
| parent | arm_dyncom_thumb: Implement REV, REV16, and REVSH. (diff) | |
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Diffstat (limited to 'src/core')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_thumb.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.cpp b/src/core/arm/dyncom/arm_dyncom_thumb.cpp index 78552293a..270d966b2 100644 --- a/src/core/arm/dyncom/arm_dyncom_thumb.cpp +++ b/src/core/arm/dyncom/arm_dyncom_thumb.cpp @@ -276,6 +276,17 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) { |(tinstr & 0x007F); // off7 } else if ((tinstr & 0x0F00) == 0x0e00) { *ainstr = 0xEF000000 | 0x180000; // base | BKPT mask + } else if ((tinstr & 0x0F00) == 0x0200) { + static const ARMword subset[4] = { + 0xE6BF0070, // SXTH + 0xE6AF0070, // SXTB + 0xE6FF0070, // UXTH + 0xE6EF0070, // UXTB + }; + + *ainstr = subset[BITS(tinstr, 6, 7)] // base + | (BITS(tinstr, 0, 2) << 12) // Rd + | BITS(tinstr, 3, 5); // Rm } else if ((tinstr & 0x0F00) == 0x0a00) { static const ARMword subset[3] = { 0xE6BF0F30, // REV |