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author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-03-23 18:39:59 +0100 |
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committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:24 +0200 |
commit | a8d8fd40f7d7b249c542e4694953e2da5998fbaf (patch) | |
tree | 8cbb29a894254f4ec6ea4f51dcae0b795aa2cf79 /src/shader_recompiler/frontend/maxwell | |
parent | vk_pipeline_cache: Add pipeline cache (diff) | |
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Diffstat (limited to 'src/shader_recompiler/frontend/maxwell')
-rw-r--r-- | src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp index b691b4d1f..d2626f3e7 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp @@ -188,6 +188,7 @@ void Impl(TranslatorVisitor& v, u64 insn, bool aoffi, Blod blod, bool lc, } }()}; + IR::Reg dest_reg{tex.dest_reg}; for (int element = 0; element < 4; ++element) { if (((tex.mask >> element) & 1) == 0) { continue; @@ -198,7 +199,8 @@ void Impl(TranslatorVisitor& v, u64 insn, bool aoffi, Blod blod, bool lc, } else { value = IR::F32{v.ir.CompositeExtract(sample, element)}; } - v.F(tex.dest_reg + element, value); + v.F(dest_reg, value); + ++dest_reg; } if (tex.sparse_pred != IR::Pred::PT) { v.ir.SetPred(tex.sparse_pred, v.ir.LogicalNot(v.ir.GetSparseFromOp(sample))); |