diff options
Diffstat (limited to 'src/video_core')
| -rw-r--r-- | src/video_core/engines/shader_bytecode.h | 6 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_shader_decompiler.cpp | 34 |
2 files changed, 39 insertions, 1 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index 625ecdfcd..38ad1ae23 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -230,6 +230,8 @@ enum class TextureType : u64 { TextureCube = 3, }; +enum class IpaMode : u64 { Pass = 0, None = 1, Constant = 2, Sc = 3 }; + union Instruction { Instruction& operator=(const Instruction& instr) { value = instr.value; @@ -313,6 +315,10 @@ union Instruction { } alu; union { + BitField<54, 3, IpaMode> mode; + } ipa; + + union { BitField<48, 1, u64> negate_b; } fmul; diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index 94e318966..c9fe37f74 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp @@ -2039,7 +2039,39 @@ private: } case OpCode::Id::IPA: { const auto& attribute = instr.attribute.fmt28; - regs.SetRegisterToInputAttibute(instr.gpr0, attribute.element, attribute.index); + const auto& reg = instr.gpr0; + switch (instr.ipa.mode) { + case Tegra::Shader::IpaMode::Pass: + if (stage == Maxwell3D::Regs::ShaderStage::Fragment && + attribute.index == Attribute::Index::Position) { + switch (attribute.element) { + case 0: + shader.AddLine(regs.GetRegisterAsFloat(reg) + " = gl_FragCoord.x;"); + break; + case 1: + shader.AddLine(regs.GetRegisterAsFloat(reg) + " = gl_FragCoord.y;"); + break; + case 2: + shader.AddLine(regs.GetRegisterAsFloat(reg) + " = gl_FragCoord.z;"); + break; + case 3: + shader.AddLine(regs.GetRegisterAsFloat(reg) + " = 1.0;"); + break; + } + } else { + regs.SetRegisterToInputAttibute(reg, attribute.element, attribute.index); + } + break; + case Tegra::Shader::IpaMode::None: + regs.SetRegisterToInputAttibute(reg, attribute.element, attribute.index); + break; + default: + LOG_CRITICAL(HW_GPU, "Unhandled IPA mode: {}", + static_cast<u32>(instr.ipa.mode.Value())); + UNREACHABLE(); + regs.SetRegisterToInputAttibute(reg, attribute.element, attribute.index); + } + break; } case OpCode::Id::SSY: { |