summaryrefslogtreecommitdiffstats
path: root/src/video_core/engines/engine_upload.h
blob: 3a817140ab1f7dbc95c0648749306fca6fa5cec8 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
// Copyright 2019 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.

#pragma once

#include <cstddef>
#include <vector>
#include "common/bit_field.h"
#include "common/common_funcs.h"
#include "common/common_types.h"

namespace Tegra {
class MemoryManager;
}

namespace Tegra::Engines::Upload {

struct Data {
    u32 line_length_in;
    u32 line_count;

    struct {
        u32 address_high;
        u32 address_low;
        u32 pitch;
        union {
            BitField<0, 4, u32> block_width;
            BitField<4, 4, u32> block_height;
            BitField<8, 4, u32> block_depth;
        };
        u32 width;
        u32 height;
        u32 depth;
        u32 z;
        u32 x;
        u32 y;

        GPUVAddr Address() const {
            return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low);
        }

        u32 BlockWidth() const {
            return 1U << block_width.Value();
        }

        u32 BlockHeight() const {
            return 1U << block_height.Value();
        }

        u32 BlockDepth() const {
            return 1U << block_depth.Value();
        }
    } dest;
};

class State {
public:
    State(MemoryManager& memory_manager, Data& regs) : memory_manager(memory_manager), regs(regs) {}
    ~State() = default;

    void ProcessExec(const bool is_linear);
    void ProcessData(const u32 data, const bool is_last_call);

private:
    u32 write_offset = 0;
    u32 copy_size = 0;
    std::vector<u8> inner_buffer;
    bool linear;
    Data& regs;
    MemoryManager& memory_manager;
};

} // namespace Tegra::Engines::Upload