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authorReinUsesLisp <reinuseslisp@airmail.cc>2021-01-25 06:48:03 +0100
committerReinUsesLisp <reinuseslisp@airmail.cc>2021-01-25 06:48:03 +0100
commit34c3ec2f8c69159fd61b42091ee3157c6e77fa30 (patch)
treeb21727e82403573764151ced5faa89caf894594e
parentMerge pull request #5819 from ReinUsesLisp/cull-mode-cast (diff)
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-rw-r--r--src/video_core/shader/node.h8
-rw-r--r--src/video_core/shader/shader_ir.cpp51
-rw-r--r--src/video_core/shader/shader_ir.h3
3 files changed, 3 insertions, 59 deletions
diff --git a/src/video_core/shader/node.h b/src/video_core/shader/node.h
index c9840b75e..b54d33763 100644
--- a/src/video_core/shader/node.h
+++ b/src/video_core/shader/node.h
@@ -465,14 +465,6 @@ public:
return operands.size();
}
- NodeBlock& GetOperands() {
- return operands;
- }
-
- const NodeBlock& GetOperands() const {
- return operands;
- }
-
[[nodiscard]] const Node& operator[](std::size_t operand_index) const {
return operands.at(operand_index);
}
diff --git a/src/video_core/shader/shader_ir.cpp b/src/video_core/shader/shader_ir.cpp
index 625a5eb46..a4987ffc6 100644
--- a/src/video_core/shader/shader_ir.cpp
+++ b/src/video_core/shader/shader_ir.cpp
@@ -388,54 +388,9 @@ void ShaderIR::SetInternalFlagsFromInteger(NodeBlock& bb, Node value, bool sets_
if (!sets_cc) {
return;
}
- switch (value->index()) {
- case 0: // Operation Node
- SearchOperands(bb, value);
- break;
- case 2: // General Purpose Node
- if (const auto* gpr = std::get_if<GprNode>(value.get())) {
- LOG_DEBUG(HW_GPU, "GprNode: index={}", gpr->GetIndex());
- Node zerop = Operation(OperationCode::LogicalIEqual, std::move(value),
- Immediate(gpr->GetIndex()));
- SetInternalFlag(bb, InternalFlag::Zero, std::move(zerop));
- }
- break;
-
- default:
- Node zerop = Operation(OperationCode::LogicalIEqual, std::move(value), Immediate(0));
- SetInternalFlag(bb, InternalFlag::Zero, std::move(zerop));
- LOG_WARNING(HW_GPU, "Node Type: {}", value->index());
- break;
- }
-}
-
-void ShaderIR::SearchOperands(NodeBlock& nb, Node var) {
- const auto* op = std::get_if<OperationNode>(var.get());
- if (op == nullptr) {
- return;
- }
-
- if (op->GetOperandsCount() == 0) {
- return;
- }
-
- for (auto& operand : op->GetOperands()) {
- switch (operand->index()) {
- case 0: // Operation Node
- return SearchOperands(nb, operand);
- case 2: // General Purpose Node
- if (const auto* gpr = std::get_if<GprNode>(operand.get())) {
- LOG_DEBUG(HW_GPU, "Child GprNode: index={}", gpr->GetIndex());
- Node zerop = Operation(OperationCode::LogicalIEqual, std::move(operand),
- Immediate(gpr->GetIndex()));
- SetInternalFlag(nb, InternalFlag::Zero, std::move(zerop));
- }
- break;
- default:
- LOG_WARNING(HW_GPU, "Child Node Type: {}", operand->index());
- break;
- }
- }
+ Node zerop = Operation(OperationCode::LogicalIEqual, std::move(value), Immediate(0));
+ SetInternalFlag(bb, InternalFlag::Zero, std::move(zerop));
+ LOG_WARNING(HW_GPU, "Condition codes implementation is incomplete");
}
Node ShaderIR::BitfieldExtract(Node value, u32 offset, u32 bits) {
diff --git a/src/video_core/shader/shader_ir.h b/src/video_core/shader/shader_ir.h
index 0afa39531..0c6ab0f07 100644
--- a/src/video_core/shader/shader_ir.h
+++ b/src/video_core/shader/shader_ir.h
@@ -346,9 +346,6 @@ private:
/// Access a bindless image sampler.
ImageEntry& GetBindlessImage(Tegra::Shader::Register reg, Tegra::Shader::ImageType type);
- /// Recursive Iteration over the OperationNode operands, searching for GprNodes.
- void SearchOperands(NodeBlock& nb, Node var);
-
/// Extracts a sequence of bits from a node
Node BitfieldExtract(Node value, u32 offset, u32 bits);