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author | Lioncash <mathew1800@gmail.com> | 2015-02-17 07:31:36 +0100 |
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committer | Lioncash <mathew1800@gmail.com> | 2015-02-17 07:37:22 +0100 |
commit | a7120662e67bdaf6fb426552644526d00df7f2e4 (patch) | |
tree | 1b50a18258e1a0e0e4f7e152f73863a41eaef344 /src/core/arm/dyncom/arm_dyncom_dec.cpp | |
parent | dyncom: Actually set the destination register for USAD8/USADA8. (diff) | |
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Diffstat (limited to 'src/core/arm/dyncom/arm_dyncom_dec.cpp')
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_dec.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_dec.cpp b/src/core/arm/dyncom/arm_dyncom_dec.cpp index ffa627352..9f3b90fd0 100644 --- a/src/core/arm/dyncom/arm_dyncom_dec.cpp +++ b/src/core/arm/dyncom/arm_dyncom_dec.cpp @@ -42,7 +42,7 @@ const ISEITEM arm_instruction[] = { { "srs", 4, 6, 25, 31, 0x0000007c, 22, 22, 0x00000001, 16, 20, 0x0000000d, 8, 11, 0x00000005 }, { "rfe", 4, 6, 25, 31, 0x0000007c, 22, 22, 0x00000000, 20, 20, 0x00000001, 8, 11, 0x0000000a }, - { "bkpt", 2, 3, 20, 31, 0x00000e12, 4, 7, 0x00000007 }, + { "bkpt", 2, 3, 20, 27, 0x00000012, 4, 7, 0x00000007 }, { "blx", 1, 3, 25, 31, 0x0000007d }, { "cps", 3, 6, 20, 31, 0x00000f10, 16, 16, 0x00000000, 5, 5, 0x00000000 }, { "pld", 4, 4, 26, 31, 0x0000003d, 24, 24, 0x00000001, 20, 22, 0x00000005, 12, 15, 0x0000000f }, |