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author | bunnei <bunneidev@gmail.com> | 2015-01-03 02:39:36 +0100 |
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committer | bunnei <bunneidev@gmail.com> | 2015-01-03 02:39:36 +0100 |
commit | 6ae381ac9e20b18ee5e90036326df4b8e5837c04 (patch) | |
tree | 65ff10f61d7615edeb9cb29fe460db442928541a /src/core/arm/interpreter | |
parent | Merge pull request #389 from lioncash/fmt (diff) | |
parent | armemu: Fix missing Q flag check for SMLSD. (diff) | |
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Diffstat (limited to 'src/core/arm/interpreter')
-rw-r--r-- | src/core/arm/interpreter/armemu.cpp | 14 | ||||
-rw-r--r-- | src/core/arm/interpreter/armsupp.cpp | 8 |
2 files changed, 15 insertions, 7 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 43b1ba40e..12166bf79 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6470,17 +6470,23 @@ L_stm_s_takeabort: if (BITS(12, 15) != 15) { state->Reg[rd_idx] += state->Reg[ra_idx]; - ARMul_AddOverflowQ(state, product1 + product2, state->Reg[ra_idx]); + if (ARMul_AddOverflowQ(product1 + product2, state->Reg[ra_idx])) + SETQ; } - ARMul_AddOverflowQ(state, product1, product2); + if (ARMul_AddOverflowQ(product1, product2)) + SETQ; } // SMUSD and SMLSD else { state->Reg[rd_idx] = product1 - product2; - - if (BITS(12, 15) != 15) + + if (BITS(12, 15) != 15) { state->Reg[rd_idx] += state->Reg[ra_idx]; + + if (ARMul_AddOverflowQ(product1 - product2, state->Reg[ra_idx])) + SETQ; + } } return 1; diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp index 426b67831..eec34143e 100644 --- a/src/core/arm/interpreter/armsupp.cpp +++ b/src/core/arm/interpreter/armsupp.cpp @@ -453,12 +453,14 @@ ARMul_AddOverflow (ARMul_State * state, ARMword a, ARMword b, ARMword result) ASSIGNV (AddOverflow (a, b, result)); } -/* Assigns the Q flag if the given result is considered an overflow from the addition of a and b */ -void ARMul_AddOverflowQ(ARMul_State* state, ARMword a, ARMword b) +// Returns true if the Q flag should be set as a result of overflow. +bool ARMul_AddOverflowQ(ARMword a, ARMword b) { u32 result = a + b; if (((result ^ a) & (u32)0x80000000) && ((a ^ b) & (u32)0x80000000) == 0) - SETQ; + return true; + + return false; } /* Assigns the C flag after an subtraction of a and b to give result. */ |