16 files changed, 974 insertions, 1121 deletions

diff --git a/src/core/arm/arm_interface.cpp b/src/core/arm/arm_interface.cpp
index d231bf89c..698c9c8ad 100644
--- a/src/core/arm/arm_interface.cpp
+++ b/src/core/arm/arm_interface.cpp
@@ -1,231 +1,32 @@
 // SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
-#include <map>
-#include <optional>
-
-#include "common/bit_field.h"
-#include "common/common_types.h"
-#include "common/demangle.h"
 #include "common/logging/log.h"
 #include "core/arm/arm_interface.h"
-#include "core/arm/symbols.h"
+#include "core/arm/debug.h"
 #include "core/core.h"
-#include "core/debugger/debugger.h"
 #include "core/hle/kernel/k_process.h"
-#include "core/hle/kernel/k_thread.h"
-#include "core/hle/kernel/svc.h"
-#include "core/loader/loader.h"
-#include "core/memory.h"
 
 namespace Core {
 
-constexpr u64 SEGMENT_BASE = 0x7100000000ull;
-
-std::vector<ARM_Interface::BacktraceEntry> ARM_Interface::GetBacktraceFromContext(
-    Core::System& system, const ARM_Interface::ThreadContext32& ctx) {
-    std::vector<BacktraceEntry> out;
-    auto& memory = system.ApplicationMemory();
-
-    const auto& reg = ctx.cpu_registers;
-    u32 pc = reg[15], lr = reg[14], fp = reg[11];
-    out.push_back({"", 0, pc, 0, ""});
-
-    // fp (= r11) points to the last frame record.
-    // Frame records are two words long:
-    // fp+0 : pointer to previous frame record
-    // fp+4 : value of lr for frame
-    for (size_t i = 0; i < 256; i++) {
-        out.push_back({"", 0, lr, 0, ""});
-        if (!fp || (fp % 4 != 0) || !memory.IsValidVirtualAddressRange(fp, 8)) {
-            break;
-        }
-        lr = memory.Read32(fp + 4);
-        fp = memory.Read32(fp);
-    }
-
-    SymbolicateBacktrace(system, out);
-
-    return out;
-}
-
-std::vector<ARM_Interface::BacktraceEntry> ARM_Interface::GetBacktraceFromContext(
-    Core::System& system, const ARM_Interface::ThreadContext64& ctx) {
-    std::vector<BacktraceEntry> out;
-    auto& memory = system.ApplicationMemory();
-
-    const auto& reg = ctx.cpu_registers;
-    u64 pc = ctx.pc, lr = reg[30], fp = reg[29];
-
-    out.push_back({"", 0, pc, 0, ""});
-
-    // fp (= x29) points to the previous frame record.
-    // Frame records are two words long:
-    // fp+0 : pointer to previous frame record
-    // fp+8 : value of lr for frame
-    for (size_t i = 0; i < 256; i++) {
-        out.push_back({"", 0, lr, 0, ""});
-        if (!fp || (fp % 4 != 0) || !memory.IsValidVirtualAddressRange(fp, 16)) {
-            break;
-        }
-        lr = memory.Read64(fp + 8);
-        fp = memory.Read64(fp);
-    }
-
-    SymbolicateBacktrace(system, out);
-
-    return out;
-}
-
-void ARM_Interface::SymbolicateBacktrace(Core::System& system, std::vector<BacktraceEntry>& out) {
-    std::map<VAddr, std::string> modules;
-    auto& loader{system.GetAppLoader()};
-    if (loader.ReadNSOModules(modules) != Loader::ResultStatus::Success) {
-        return;
-    }
-
-    std::map<std::string, Symbols::Symbols> symbols;
-    for (const auto& module : modules) {
-        symbols.insert_or_assign(module.second,
-                                 Symbols::GetSymbols(module.first, system.ApplicationMemory(),
-                                                     system.ApplicationProcess()->Is64Bit()));
-    }
-
-    for (auto& entry : out) {
-        VAddr base = 0;
-        for (auto iter = modules.rbegin(); iter != modules.rend(); ++iter) {
-            const auto& module{*iter};
-            if (entry.original_address >= module.first) {
-                entry.module = module.second;
-                base = module.first;
-                break;
-            }
-        }
-
-        entry.offset = entry.original_address - base;
-        entry.address = SEGMENT_BASE + entry.offset;
-
-        if (entry.module.empty()) {
-            entry.module = "unknown";
-        }
-
-        const auto symbol_set = symbols.find(entry.module);
-        if (symbol_set != symbols.end()) {
-            const auto symbol = Symbols::GetSymbolName(symbol_set->second, entry.offset);
-            if (symbol) {
-                entry.name = Common::DemangleSymbol(*symbol);
-            }
-        }
-    }
-}
-
-std::vector<ARM_Interface::BacktraceEntry> ARM_Interface::GetBacktrace() const {
-    if (GetArchitecture() == Architecture::Aarch64) {
-        ThreadContext64 ctx;
-        SaveContext(ctx);
-        return GetBacktraceFromContext(system, ctx);
-    } else {
-        ThreadContext32 ctx;
-        SaveContext(ctx);
-        return GetBacktraceFromContext(system, ctx);
-    }
-}
+void ArmInterface::LogBacktrace(const Kernel::KProcess* process) const {
+    Kernel::Svc::ThreadContext ctx;
+    this->GetContext(ctx);
 
-void ARM_Interface::LogBacktrace() const {
-    const VAddr sp = GetSP();
-    const VAddr pc = GetPC();
-    LOG_ERROR(Core_ARM, "Backtrace, sp={:016X}, pc={:016X}", sp, pc);
+    LOG_ERROR(Core_ARM, "Backtrace, sp={:016X}, pc={:016X}", ctx.sp, ctx.pc);
     LOG_ERROR(Core_ARM, "{:20}{:20}{:20}{:20}{}", "Module Name", "Address", "Original Address",
               "Offset", "Symbol");
     LOG_ERROR(Core_ARM, "");
-    const auto backtrace = GetBacktrace();
+    const auto backtrace = GetBacktraceFromContext(process, ctx);
     for (const auto& entry : backtrace) {
         LOG_ERROR(Core_ARM, "{:20}{:016X}    {:016X}    {:016X}    {}", entry.module, entry.address,
                   entry.original_address, entry.offset, entry.name);
     }
 }
 
-void ARM_Interface::Run() {
-    using Kernel::StepState;
-    using Kernel::SuspendType;
-
-    while (true) {
-        Kernel::KThread* current_thread{Kernel::GetCurrentThreadPointer(system.Kernel())};
-        HaltReason hr{};
-
-        // If the thread is scheduled for termination, exit the thread.
-        if (current_thread->HasDpc()) {
-            if (current_thread->IsTerminationRequested()) {
-                current_thread->Exit();
-                UNREACHABLE();
-            }
-        }
-
-        // Notify the debugger and go to sleep if a step was performed
-        // and this thread has been scheduled again.
-        if (current_thread->GetStepState() == StepState::StepPerformed) {
-            system.GetDebugger().NotifyThreadStopped(current_thread);
-            current_thread->RequestSuspend(SuspendType::Debug);
-            break;
-        }
-
-        // Otherwise, run the thread.
-        system.EnterCPUProfile();
-        if (current_thread->GetStepState() == StepState::StepPending) {
-            hr = StepJit();
-
-            if (True(hr & HaltReason::StepThread)) {
-                current_thread->SetStepState(StepState::StepPerformed);
-            }
-        } else {
-            hr = RunJit();
-        }
-        system.ExitCPUProfile();
-
-        // Notify the debugger and go to sleep if a breakpoint was hit,
-        // or if the thread is unable to continue for any reason.
-        if (True(hr & HaltReason::InstructionBreakpoint) || True(hr & HaltReason::PrefetchAbort)) {
-            if (!True(hr & HaltReason::PrefetchAbort)) {
-                RewindBreakpointInstruction();
-            }
-            if (system.DebuggerEnabled()) {
-                system.GetDebugger().NotifyThreadStopped(current_thread);
-            } else {
-                LogBacktrace();
-            }
-            current_thread->RequestSuspend(SuspendType::Debug);
-            break;
-        }
-
-        // Notify the debugger and go to sleep if a watchpoint was hit.
-        if (True(hr & HaltReason::DataAbort)) {
-            if (system.DebuggerEnabled()) {
-                system.GetDebugger().NotifyThreadWatchpoint(current_thread, *HaltedWatchpoint());
-            } else {
-                LogBacktrace();
-            }
-            current_thread->RequestSuspend(SuspendType::Debug);
-            break;
-        }
-
-        // Handle syscalls and scheduling (this may change the current thread/core)
-        if (True(hr & HaltReason::SupervisorCall)) {
-            Kernel::Svc::Call(system, GetSvcNumber());
-            break;
-        }
-        if (True(hr & HaltReason::BreakLoop) || !uses_wall_clock) {
-            break;
-        }
-    }
-}
-
-void ARM_Interface::LoadWatchpointArray(const WatchpointArray* wp) {
-    watchpoints = wp;
-}
-
-const Kernel::DebugWatchpoint* ARM_Interface::MatchingWatchpoint(
+const Kernel::DebugWatchpoint* ArmInterface::MatchingWatchpoint(
     u64 addr, u64 size, Kernel::DebugWatchpointType access_type) const {
-    if (!watchpoints) {
+    if (!m_watchpoints) {
         return nullptr;
     }
 
@@ -233,7 +34,7 @@ const Kernel::DebugWatchpoint* ARM_Interface::MatchingWatchpoint(
     const u64 end_address{addr + size};
 
     for (size_t i = 0; i < Core::Hardware::NUM_WATCHPOINTS; i++) {
-        const auto& watch{(*watchpoints)[i]};
+        const auto& watch{(*m_watchpoints)[i]};
 
         if (end_address <= GetInteger(watch.start_address)) {
             continue;
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h
index a9d9ac09d..806c7c9e9 100644
--- a/src/core/arm/arm_interface.h
+++ b/src/core/arm/arm_interface.h
@@ -12,20 +12,20 @@
 #include "common/common_types.h"
 #include "core/hardware_properties.h"
 
+#include "core/hle/kernel/svc_types.h"
+
 namespace Common {
 struct PageTable;
 }
 
 namespace Kernel {
-enum class VMAPermission : u8;
 enum class DebugWatchpointType : u8;
 struct DebugWatchpoint;
+class KThread;
+class KProcess;
 } // namespace Kernel
 
 namespace Core {
-class System;
-class CPUInterruptHandler;
-
 using WatchpointArray = std::array<Kernel::DebugWatchpoint, Core::Hardware::NUM_WATCHPOINTS>;
 
 // NOTE: these values match the HaltReason enum in Dynarmic
@@ -40,197 +40,74 @@ enum class HaltReason : u64 {
 DECLARE_ENUM_FLAG_OPERATORS(HaltReason);
 
 enum class Architecture {
-    Aarch32,
-    Aarch64,
+    AArch64,
+    AArch32,
 };
 
 /// Generic ARMv8 CPU interface
-class ARM_Interface {
+class ArmInterface {
 public:
-    YUZU_NON_COPYABLE(ARM_Interface);
-    YUZU_NON_MOVEABLE(ARM_Interface);
-
-    explicit ARM_Interface(System& system_, bool uses_wall_clock_)
-        : system{system_}, uses_wall_clock{uses_wall_clock_} {}
-    virtual ~ARM_Interface() = default;
-
-    struct ThreadContext32 {
-        std::array<u32, 16> cpu_registers{};
-        std::array<u32, 64> extension_registers{};
-        u32 cpsr{};
-        u32 fpscr{};
-        u32 fpexc{};
-        u32 tpidr{};
-    };
-    // Internally within the kernel, it expects the AArch32 version of the
-    // thread context to be 344 bytes in size.
-    static_assert(sizeof(ThreadContext32) == 0x150);
-
-    struct ThreadContext64 {
-        std::array<u64, 31> cpu_registers{};
-        u64 sp{};
-        u64 pc{};
-        u32 pstate{};
-        std::array<u8, 4> padding{};
-        std::array<u128, 32> vector_registers{};
-        u32 fpcr{};
-        u32 fpsr{};
-        u64 tpidr{};
-    };
-    // Internally within the kernel, it expects the AArch64 version of the
-    // thread context to be 800 bytes in size.
-    static_assert(sizeof(ThreadContext64) == 0x320);
-
-    /// Perform any backend-specific initialization.
+    YUZU_NON_COPYABLE(ArmInterface);
+    YUZU_NON_MOVEABLE(ArmInterface);
+
+    explicit ArmInterface(bool uses_wall_clock) : m_uses_wall_clock{uses_wall_clock} {}
+    virtual ~ArmInterface() = default;
+
+    // Perform any backend-specific initialization.
     virtual void Initialize() {}
 
-    /// Runs the CPU until an event happens
-    void Run();
+    // Runs the CPU until an event happens.
+    virtual HaltReason RunThread(Kernel::KThread* thread) = 0;
 
-    /// Clear all instruction cache
+    // Runs the CPU for one instruction or until an event happens.
+    virtual HaltReason StepThread(Kernel::KThread* thread) = 0;
+
+    // Admits a backend-specific mechanism to lock the thread context.
+    virtual void LockThread(Kernel::KThread* thread) {}
+    virtual void UnlockThread(Kernel::KThread* thread) {}
+
+    // Clear the entire instruction cache for this CPU.
     virtual void ClearInstructionCache() = 0;
 
-    /**
-     * Clear instruction cache range
-     * @param addr Start address of the cache range to clear
-     * @param size Size of the cache range to clear, starting at addr
-     */
+    // Clear a range of the instruction cache for this CPU.
     virtual void InvalidateCacheRange(u64 addr, std::size_t size) = 0;
 
-    /**
-     * Notifies CPU emulation that the current page table has changed.
-     *  @param new_page_table                 The new page table.
-     *  @param new_address_space_size_in_bits The new usable size of the address space in bits.
-     *                                        This can be either 32, 36, or 39 on official software.
-     */
-    virtual void PageTableChanged(Common::PageTable& new_page_table,
-                                  std::size_t new_address_space_size_in_bits) = 0;
-
-    /**
-     * Set the Program Counter to an address
-     * @param addr Address to set PC to
-     */
-    virtual void SetPC(u64 addr) = 0;
-
-    /*
-     * Get the current Program Counter
-     * @return Returns current PC
-     */
-    virtual u64 GetPC() const = 0;
-
-    /**
-     * Get the current Stack Pointer
-     * @return Returns current SP
-     */
-    virtual u64 GetSP() const = 0;
-
-    /**
-     * Get an ARM register
-     * @param index Register index
-     * @return Returns the value in the register
-     */
-    virtual u64 GetReg(int index) const = 0;
-
-    /**
-     * Set an ARM register
-     * @param index Register index
-     * @param value Value to set register to
-     */
-    virtual void SetReg(int index, u64 value) = 0;
-
-    /**
-     * Gets the value of a specified vector register.
-     *
-     * @param index The index of the vector register.
-     * @return the value within the vector register.
-     */
-    virtual u128 GetVectorReg(int index) const = 0;
-
-    /**
-     * Sets a given value into a vector register.
-     *
-     * @param index The index of the vector register.
-     * @param value The new value to place in the register.
-     */
-    virtual void SetVectorReg(int index, u128 value) = 0;
-
-    /**
-     * Get the current PSTATE register
-     * @return Returns the value of the PSTATE register
-     */
-    virtual u32 GetPSTATE() const = 0;
-
-    /**
-     * Set the current PSTATE register
-     * @param pstate Value to set PSTATE to
-     */
-    virtual void SetPSTATE(u32 pstate) = 0;
-
-    virtual u64 GetTlsAddress() const = 0;
-
-    virtual void SetTlsAddress(u64 address) = 0;
-
-    /**
-     * Gets the value within the TPIDR_EL0 (read/write software thread ID) register.
-     *
-     * @return the value within the register.
-     */
-    virtual u64 GetTPIDR_EL0() const = 0;
-
-    /**
-     * Sets a new value within the TPIDR_EL0 (read/write software thread ID) register.
-     *
-     * @param value The new value to place in the register.
-     */
-    virtual void SetTPIDR_EL0(u64 value) = 0;
-
+    // Get the current architecture.
+    // This returns AArch64 when PSTATE.nRW == 0 and AArch32 when PSTATE.nRW == 1.
     virtual Architecture GetArchitecture() const = 0;
-    virtual void SaveContext(ThreadContext32& ctx) const = 0;
-    virtual void SaveContext(ThreadContext64& ctx) const = 0;
-    virtual void LoadContext(const ThreadContext32& ctx) = 0;
-    virtual void LoadContext(const ThreadContext64& ctx) = 0;
-    void LoadWatchpointArray(const WatchpointArray* wp);
 
-    /// Clears the exclusive monitor's state.
-    virtual void ClearExclusiveState() = 0;
+    // Context accessors.
+    // These should not be called if the CPU is running.
+    virtual void GetContext(Kernel::Svc::ThreadContext& ctx) const = 0;
+    virtual void SetContext(const Kernel::Svc::ThreadContext& ctx) = 0;
+    virtual void SetTpidrroEl0(u64 value) = 0;
 
-    /// Signal an interrupt and ask the core to halt as soon as possible.
-    virtual void SignalInterrupt() = 0;
+    virtual void GetSvcArguments(std::span<uint64_t, 8> args) const = 0;
+    virtual void SetSvcArguments(std::span<const uint64_t, 8> args) = 0;
+    virtual u32 GetSvcNumber() const = 0;
 
-    /// Clear a previous interrupt.
-    virtual void ClearInterrupt() = 0;
+    void SetWatchpointArray(const WatchpointArray* watchpoints) {
+        m_watchpoints = watchpoints;
+    }
 
-    struct BacktraceEntry {
-        std::string module;
-        u64 address;
-        u64 original_address;
-        u64 offset;
-        std::string name;
-    };
+    // Signal an interrupt for execution to halt as soon as possible.
+    // It is safe to call this if the CPU is not running.
+    virtual void SignalInterrupt(Kernel::KThread* thread) = 0;
 
-    static std::vector<BacktraceEntry> GetBacktraceFromContext(System& system,
-                                                               const ThreadContext32& ctx);
-    static std::vector<BacktraceEntry> GetBacktraceFromContext(System& system,
-                                                               const ThreadContext64& ctx);
+    // Stack trace generation.
+    void LogBacktrace(const Kernel::KProcess* process) const;
 
-    std::vector<BacktraceEntry> GetBacktrace() const;
-    void LogBacktrace() const;
+    // Debug functionality.
+    virtual const Kernel::DebugWatchpoint* HaltedWatchpoint() const = 0;
+    virtual void RewindBreakpointInstruction() = 0;
 
 protected:
-    /// System context that this ARM interface is running under.
-    System& system;
-    const WatchpointArray* watchpoints;
-    bool uses_wall_clock;
-
-    static void SymbolicateBacktrace(Core::System& system, std::vector<BacktraceEntry>& out);
     const Kernel::DebugWatchpoint* MatchingWatchpoint(
         u64 addr, u64 size, Kernel::DebugWatchpointType access_type) const;
 
-    virtual HaltReason RunJit() = 0;
-    virtual HaltReason StepJit() = 0;
-    virtual u32 GetSvcNumber() const = 0;
-    virtual const Kernel::DebugWatchpoint* HaltedWatchpoint() const = 0;
-    virtual void RewindBreakpointInstruction() = 0;
+protected:
+    const WatchpointArray* m_watchpoints{};
+    bool m_uses_wall_clock{};
 };
 
 } // namespace Core
diff --git a/src/core/arm/debug.cpp b/src/core/arm/debug.cpp
new file mode 100644
index 000000000..1fe37b8ee
--- /dev/null
+++ b/src/core/arm/debug.cpp
@@ -0,0 +1,351 @@
+// SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "common/demangle.h"
+#include "core/arm/debug.h"
+#include "core/arm/symbols.h"
+#include "core/hle/kernel/k_process.h"
+#include "core/hle/kernel/k_thread.h"
+#include "core/memory.h"
+
+namespace Core {
+
+namespace {
+
+std::optional<std::string> GetNameFromThreadType64(Core::Memory::Memory& memory,
+                                                   const Kernel::KThread& thread) {
+    // Read thread type from TLS
+    const VAddr tls_thread_type{memory.Read64(thread.GetTlsAddress() + 0x1f8)};
+    const VAddr argument_thread_type{thread.GetArgument()};
+
+    if (argument_thread_type && tls_thread_type != argument_thread_type) {
+        // Probably not created by nnsdk, no name available.
+        return std::nullopt;
+    }
+
+    if (!tls_thread_type) {
+        return std::nullopt;
+    }
+
+    const u16 version{memory.Read16(tls_thread_type + 0x46)};
+    VAddr name_pointer{};
+    if (version == 1) {
+        name_pointer = memory.Read64(tls_thread_type + 0x1a0);
+    } else {
+        name_pointer = memory.Read64(tls_thread_type + 0x1a8);
+    }
+
+    if (!name_pointer) {
+        // No name provided.
+        return std::nullopt;
+    }
+
+    return memory.ReadCString(name_pointer, 256);
+}
+
+std::optional<std::string> GetNameFromThreadType32(Core::Memory::Memory& memory,
+                                                   const Kernel::KThread& thread) {
+    // Read thread type from TLS
+    const VAddr tls_thread_type{memory.Read32(thread.GetTlsAddress() + 0x1fc)};
+    const VAddr argument_thread_type{thread.GetArgument()};
+
+    if (argument_thread_type && tls_thread_type != argument_thread_type) {
+        // Probably not created by nnsdk, no name available.
+        return std::nullopt;
+    }
+
+    if (!tls_thread_type) {
+        return std::nullopt;
+    }
+
+    const u16 version{memory.Read16(tls_thread_type + 0x26)};
+    VAddr name_pointer{};
+    if (version == 1) {
+        name_pointer = memory.Read32(tls_thread_type + 0xe4);
+    } else {
+        name_pointer = memory.Read32(tls_thread_type + 0xe8);
+    }
+
+    if (!name_pointer) {
+        // No name provided.
+        return std::nullopt;
+    }
+
+    return memory.ReadCString(name_pointer, 256);
+}
+
+constexpr std::array<u64, 2> SegmentBases{
+    0x60000000ULL,
+    0x7100000000ULL,
+};
+
+void SymbolicateBacktrace(const Kernel::KProcess* process, std::vector<BacktraceEntry>& out) {
+    auto modules = FindModules(process);
+
+    const bool is_64 = process->Is64Bit();
+
+    std::map<std::string, Symbols::Symbols> symbols;
+    for (const auto& module : modules) {
+        symbols.insert_or_assign(module.second,
+                                 Symbols::GetSymbols(module.first, process->GetMemory(), is_64));
+    }
+
+    for (auto& entry : out) {
+        VAddr base = 0;
+        for (auto iter = modules.rbegin(); iter != modules.rend(); ++iter) {
+            const auto& module{*iter};
+            if (entry.original_address >= module.first) {
+                entry.module = module.second;
+                base = module.first;
+                break;
+            }
+        }
+
+        entry.offset = entry.original_address - base;
+        entry.address = SegmentBases[is_64] + entry.offset;
+
+        if (entry.module.empty()) {
+            entry.module = "unknown";
+        }
+
+        const auto symbol_set = symbols.find(entry.module);
+        if (symbol_set != symbols.end()) {
+            const auto symbol = Symbols::GetSymbolName(symbol_set->second, entry.offset);
+            if (symbol) {
+                entry.name = Common::DemangleSymbol(*symbol);
+            }
+        }
+    }
+}
+
+std::vector<BacktraceEntry> GetAArch64Backtrace(const Kernel::KProcess* process,
+                                                const Kernel::Svc::ThreadContext& ctx) {
+    std::vector<BacktraceEntry> out;
+    auto& memory = process->GetMemory();
+    auto pc = ctx.pc, lr = ctx.lr, fp = ctx.fp;
+
+    out.push_back({"", 0, pc, 0, ""});
+
+    // fp (= x29) points to the previous frame record.
+    // Frame records are two words long:
+    // fp+0 : pointer to previous frame record
+    // fp+8 : value of lr for frame
+    for (size_t i = 0; i < 256; i++) {
+        out.push_back({"", 0, lr, 0, ""});
+        if (!fp || (fp % 4 != 0) || !memory.IsValidVirtualAddressRange(fp, 16)) {
+            break;
+        }
+        lr = memory.Read64(fp + 8);
+        fp = memory.Read64(fp);
+    }
+
+    SymbolicateBacktrace(process, out);
+
+    return out;
+}
+
+std::vector<BacktraceEntry> GetAArch32Backtrace(const Kernel::KProcess* process,
+                                                const Kernel::Svc::ThreadContext& ctx) {
+    std::vector<BacktraceEntry> out;
+    auto& memory = process->GetMemory();
+    auto pc = ctx.pc, lr = ctx.lr, fp = ctx.fp;
+
+    out.push_back({"", 0, pc, 0, ""});
+
+    // fp (= r11) points to the last frame record.
+    // Frame records are two words long:
+    // fp+0 : pointer to previous frame record
+    // fp+4 : value of lr for frame
+    for (size_t i = 0; i < 256; i++) {
+        out.push_back({"", 0, lr, 0, ""});
+        if (!fp || (fp % 4 != 0) || !memory.IsValidVirtualAddressRange(fp, 8)) {
+            break;
+        }
+        lr = memory.Read32(fp + 4);
+        fp = memory.Read32(fp);
+    }
+
+    SymbolicateBacktrace(process, out);
+
+    return out;
+}
+
+} // namespace
+
+std::optional<std::string> GetThreadName(const Kernel::KThread* thread) {
+    const auto* process = thread->GetOwnerProcess();
+    if (process->Is64Bit()) {
+        return GetNameFromThreadType64(process->GetMemory(), *thread);
+    } else {
+        return GetNameFromThreadType32(process->GetMemory(), *thread);
+    }
+}
+
+std::string_view GetThreadWaitReason(const Kernel::KThread* thread) {
+    switch (thread->GetWaitReasonForDebugging()) {
+    case Kernel::ThreadWaitReasonForDebugging::Sleep:
+        return "Sleep";
+    case Kernel::ThreadWaitReasonForDebugging::IPC:
+        return "IPC";
+    case Kernel::ThreadWaitReasonForDebugging::Synchronization:
+        return "Synchronization";
+    case Kernel::ThreadWaitReasonForDebugging::ConditionVar:
+        return "ConditionVar";
+    case Kernel::ThreadWaitReasonForDebugging::Arbitration:
+        return "Arbitration";
+    case Kernel::ThreadWaitReasonForDebugging::Suspended:
+        return "Suspended";
+    default:
+        return "Unknown";
+    }
+}
+
+std::string GetThreadState(const Kernel::KThread* thread) {
+    switch (thread->GetState()) {
+    case Kernel::ThreadState::Initialized:
+        return "Initialized";
+    case Kernel::ThreadState::Waiting:
+        return fmt::format("Waiting ({})", GetThreadWaitReason(thread));
+    case Kernel::ThreadState::Runnable:
+        return "Runnable";
+    case Kernel::ThreadState::Terminated:
+        return "Terminated";
+    default:
+        return "Unknown";
+    }
+}
+
+Kernel::KProcessAddress GetModuleEnd(const Kernel::KProcess* process,
+                                     Kernel::KProcessAddress base) {
+    Kernel::KMemoryInfo mem_info;
+    Kernel::Svc::MemoryInfo svc_mem_info;
+    Kernel::Svc::PageInfo page_info;
+    VAddr cur_addr{GetInteger(base)};
+    auto& page_table = process->GetPageTable();
+
+    // Expect: r-x Code (.text)
+    R_ASSERT(page_table.QueryInfo(std::addressof(mem_info), std::addressof(page_info), cur_addr));
+    svc_mem_info = mem_info.GetSvcMemoryInfo();
+    cur_addr = svc_mem_info.base_address + svc_mem_info.size;
+    if (svc_mem_info.state != Kernel::Svc::MemoryState::Code ||
+        svc_mem_info.permission != Kernel::Svc::MemoryPermission::ReadExecute) {
+        return cur_addr - 1;
+    }
+
+    // Expect: r-- Code (.rodata)
+    R_ASSERT(page_table.QueryInfo(std::addressof(mem_info), std::addressof(page_info), cur_addr));
+    svc_mem_info = mem_info.GetSvcMemoryInfo();
+    cur_addr = svc_mem_info.base_address + svc_mem_info.size;
+    if (svc_mem_info.state != Kernel::Svc::MemoryState::Code ||
+        svc_mem_info.permission != Kernel::Svc::MemoryPermission::Read) {
+        return cur_addr - 1;
+    }
+
+    // Expect: rw- CodeData (.data)
+    R_ASSERT(page_table.QueryInfo(std::addressof(mem_info), std::addressof(page_info), cur_addr));
+    svc_mem_info = mem_info.GetSvcMemoryInfo();
+    cur_addr = svc_mem_info.base_address + svc_mem_info.size;
+    return cur_addr - 1;
+}
+
+Loader::AppLoader::Modules FindModules(const Kernel::KProcess* process) {
+    Loader::AppLoader::Modules modules;
+
+    auto& page_table = process->GetPageTable();
+    auto& memory = process->GetMemory();
+    VAddr cur_addr = 0;
+
+    // Look for executable sections in Code or AliasCode regions.
+    while (true) {
+        Kernel::KMemoryInfo mem_info{};
+        Kernel::Svc::PageInfo page_info{};
+        R_ASSERT(
+            page_table.QueryInfo(std::addressof(mem_info), std::addressof(page_info), cur_addr));
+        auto svc_mem_info = mem_info.GetSvcMemoryInfo();
+
+        if (svc_mem_info.permission == Kernel::Svc::MemoryPermission::ReadExecute &&
+            (svc_mem_info.state == Kernel::Svc::MemoryState::Code ||
+             svc_mem_info.state == Kernel::Svc::MemoryState::AliasCode)) {
+            // Try to read the module name from its path.
+            constexpr s32 PathLengthMax = 0x200;
+            struct {
+                u32 zero;
+                s32 path_length;
+                std::array<char, PathLengthMax> path;
+            } module_path;
+
+            if (memory.ReadBlock(svc_mem_info.base_address + svc_mem_info.size, &module_path,
+                                 sizeof(module_path))) {
+                if (module_path.zero == 0 && module_path.path_length > 0) {
+                    // Truncate module name.
+                    module_path.path[PathLengthMax - 1] = '\0';
+
+                    // Ignore leading directories.
+                    char* path_pointer = module_path.path.data();
+
+                    for (s32 i = 0; i < std::min(PathLengthMax, module_path.path_length) &&
+                                    module_path.path[i] != '\0';
+                         i++) {
+                        if (module_path.path[i] == '/' || module_path.path[i] == '\\') {
+                            path_pointer = module_path.path.data() + i + 1;
+                        }
+                    }
+
+                    // Insert output.
+                    modules.emplace(svc_mem_info.base_address, path_pointer);
+                }
+            }
+        }
+
+        // Check if we're done.
+        const uintptr_t next_address = svc_mem_info.base_address + svc_mem_info.size;
+        if (next_address <= cur_addr) {
+            break;
+        }
+
+        cur_addr = next_address;
+    }
+
+    return modules;
+}
+
+Kernel::KProcessAddress FindMainModuleEntrypoint(const Kernel::KProcess* process) {
+    // Do we have any loaded executable sections?
+    auto modules = FindModules(process);
+
+    if (modules.size() >= 2) {
+        // If we have two or more, the first one is rtld and the second is main.
+        return std::next(modules.begin())->first;
+    } else if (!modules.empty()) {
+        // If we only have one, this is the main module.
+        return modules.begin()->first;
+    }
+
+    // As a last resort, use the start of the code region.
+    return GetInteger(process->GetPageTable().GetCodeRegionStart());
+}
+
+void InvalidateInstructionCacheRange(const Kernel::KProcess* process, u64 address, u64 size) {
+    for (size_t i = 0; i < Core::Hardware::NUM_CPU_CORES; i++) {
+        auto* interface = process->GetArmInterface(i);
+        if (interface) {
+            interface->InvalidateCacheRange(address, size);
+        }
+    }
+}
+
+std::vector<BacktraceEntry> GetBacktraceFromContext(const Kernel::KProcess* process,
+                                                    const Kernel::Svc::ThreadContext& ctx) {
+    if (process->Is64Bit()) {
+        return GetAArch64Backtrace(process, ctx);
+    } else {
+        return GetAArch32Backtrace(process, ctx);
+    }
+}
+
+std::vector<BacktraceEntry> GetBacktrace(const Kernel::KThread* thread) {
+    Kernel::Svc::ThreadContext ctx = thread->GetContext();
+    return GetBacktraceFromContext(thread->GetOwnerProcess(), ctx);
+}
+
+} // namespace Core
diff --git a/src/core/arm/debug.h b/src/core/arm/debug.h
new file mode 100644
index 000000000..c542633db
--- /dev/null
+++ b/src/core/arm/debug.h
@@ -0,0 +1,35 @@
+// SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#pragma once
+
+#include <optional>
+
+#include "core/hle/kernel/k_thread.h"
+#include "core/loader/loader.h"
+
+namespace Core {
+
+std::optional<std::string> GetThreadName(const Kernel::KThread* thread);
+std::string_view GetThreadWaitReason(const Kernel::KThread* thread);
+std::string GetThreadState(const Kernel::KThread* thread);
+
+Loader::AppLoader::Modules FindModules(const Kernel::KProcess* process);
+Kernel::KProcessAddress GetModuleEnd(const Kernel::KProcess* process, Kernel::KProcessAddress base);
+Kernel::KProcessAddress FindMainModuleEntrypoint(const Kernel::KProcess* process);
+
+void InvalidateInstructionCacheRange(const Kernel::KProcess* process, u64 address, u64 size);
+
+struct BacktraceEntry {
+    std::string module;
+    u64 address;
+    u64 original_address;
+    u64 offset;
+    std::string name;
+};
+
+std::vector<BacktraceEntry> GetBacktraceFromContext(const Kernel::KProcess* process,
+                                                    const Kernel::Svc::ThreadContext& ctx);
+std::vector<BacktraceEntry> GetBacktrace(const Kernel::KThread* thread);
+
+} // namespace Core
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
index 44a297cdc..cf52c0505 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
@@ -1,25 +1,13 @@
 // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
-#include <cinttypes>
-#include <memory>
-#include <dynarmic/interface/A32/a32.h>
-#include <dynarmic/interface/A32/config.h>
-#include "common/assert.h"
-#include "common/literals.h"
-#include "common/logging/log.h"
-#include "common/page_table.h"
 #include "common/settings.h"
 #include "core/arm/dynarmic/arm_dynarmic.h"
 #include "core/arm/dynarmic/arm_dynarmic_32.h"
 #include "core/arm/dynarmic/dynarmic_cp15.h"
 #include "core/arm/dynarmic/dynarmic_exclusive_monitor.h"
-#include "core/core.h"
 #include "core/core_timing.h"
-#include "core/debugger/debugger.h"
 #include "core/hle/kernel/k_process.h"
-#include "core/hle/kernel/svc.h"
-#include "core/memory.h"
 
 namespace Core {
 
@@ -27,78 +15,78 @@ using namespace Common::Literals;
 
 class DynarmicCallbacks32 : public Dynarmic::A32::UserCallbacks {
 public:
-    explicit DynarmicCallbacks32(ARM_Dynarmic_32& parent_)
-        : parent{parent_}, memory(parent.system.ApplicationMemory()),
-          debugger_enabled{parent.system.DebuggerEnabled()},
-          check_memory_access{debugger_enabled ||
-                              !Settings::values.cpuopt_ignore_memory_aborts.GetValue()} {}
+    explicit DynarmicCallbacks32(ArmDynarmic32& parent, const Kernel::KProcess* process)
+        : m_parent{parent}, m_memory(process->GetMemory()),
+          m_process(process), m_debugger_enabled{parent.m_system.DebuggerEnabled()},
+          m_check_memory_access{m_debugger_enabled ||
+                                !Settings::values.cpuopt_ignore_memory_aborts.GetValue()} {}
 
     u8 MemoryRead8(u32 vaddr) override {
         CheckMemoryAccess(vaddr, 1, Kernel::DebugWatchpointType::Read);
-        return memory.Read8(vaddr);
+        return m_memory.Read8(vaddr);
     }
     u16 MemoryRead16(u32 vaddr) override {
         CheckMemoryAccess(vaddr, 2, Kernel::DebugWatchpointType::Read);
-        return memory.Read16(vaddr);
+        return m_memory.Read16(vaddr);
     }
     u32 MemoryRead32(u32 vaddr) override {
         CheckMemoryAccess(vaddr, 4, Kernel::DebugWatchpointType::Read);
-        return memory.Read32(vaddr);
+        return m_memory.Read32(vaddr);
     }
     u64 MemoryRead64(u32 vaddr) override {
         CheckMemoryAccess(vaddr, 8, Kernel::DebugWatchpointType::Read);
-        return memory.Read64(vaddr);
+        return m_memory.Read64(vaddr);
     }
     std::optional<u32> MemoryReadCode(u32 vaddr) override {
-        if (!memory.IsValidVirtualAddressRange(vaddr, sizeof(u32))) {
+        if (!m_memory.IsValidVirtualAddressRange(vaddr, sizeof(u32))) {
             return std::nullopt;
         }
-        return memory.Read32(vaddr);
+        return m_memory.Read32(vaddr);
     }
 
     void MemoryWrite8(u32 vaddr, u8 value) override {
         if (CheckMemoryAccess(vaddr, 1, Kernel::DebugWatchpointType::Write)) {
-            memory.Write8(vaddr, value);
+            m_memory.Write8(vaddr, value);
         }
     }
     void MemoryWrite16(u32 vaddr, u16 value) override {
         if (CheckMemoryAccess(vaddr, 2, Kernel::DebugWatchpointType::Write)) {
-            memory.Write16(vaddr, value);
+            m_memory.Write16(vaddr, value);
         }
     }
     void MemoryWrite32(u32 vaddr, u32 value) override {
         if (CheckMemoryAccess(vaddr, 4, Kernel::DebugWatchpointType::Write)) {
-            memory.Write32(vaddr, value);
+            m_memory.Write32(vaddr, value);
         }
     }
     void MemoryWrite64(u32 vaddr, u64 value) override {
         if (CheckMemoryAccess(vaddr, 8, Kernel::DebugWatchpointType::Write)) {
-            memory.Write64(vaddr, value);
+            m_memory.Write64(vaddr, value);
         }
     }
 
     bool MemoryWriteExclusive8(u32 vaddr, u8 value, u8 expected) override {
         return CheckMemoryAccess(vaddr, 1, Kernel::DebugWatchpointType::Write) &&
-               memory.WriteExclusive8(vaddr, value, expected);
+               m_memory.WriteExclusive8(vaddr, value, expected);
     }
     bool MemoryWriteExclusive16(u32 vaddr, u16 value, u16 expected) override {
         return CheckMemoryAccess(vaddr, 2, Kernel::DebugWatchpointType::Write) &&
-               memory.WriteExclusive16(vaddr, value, expected);
+               m_memory.WriteExclusive16(vaddr, value, expected);
     }
     bool MemoryWriteExclusive32(u32 vaddr, u32 value, u32 expected) override {
         return CheckMemoryAccess(vaddr, 4, Kernel::DebugWatchpointType::Write) &&
-               memory.WriteExclusive32(vaddr, value, expected);
+               m_memory.WriteExclusive32(vaddr, value, expected);
     }
     bool MemoryWriteExclusive64(u32 vaddr, u64 value, u64 expected) override {
         return CheckMemoryAccess(vaddr, 8, Kernel::DebugWatchpointType::Write) &&
-               memory.WriteExclusive64(vaddr, value, expected);
+               m_memory.WriteExclusive64(vaddr, value, expected);
     }
 
     void InterpreterFallback(u32 pc, std::size_t num_instructions) override {
-        parent.LogBacktrace();
+        m_parent.LogBacktrace(m_process);
         LOG_ERROR(Core_ARM,
                   "Unimplemented instruction @ 0x{:X} for {} instructions (instr = {:08X})", pc,
-                  num_instructions, memory.Read32(pc));
+                  num_instructions, m_memory.Read32(pc));
     }
 
     void ExceptionRaised(u32 pc, Dynarmic::A32::Exception exception) override {
@@ -108,73 +96,64 @@ public:
             ReturnException(pc, PrefetchAbort);
             return;
         default:
-            if (debugger_enabled) {
+            if (m_debugger_enabled) {
                 ReturnException(pc, InstructionBreakpoint);
                 return;
             }
 
-            parent.LogBacktrace();
+            m_parent.LogBacktrace(m_process);
             LOG_CRITICAL(Core_ARM,
                          "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X}, thumb = {})",
-                         exception, pc, memory.Read32(pc), parent.IsInThumbMode());
+                         exception, pc, m_memory.Read32(pc), m_parent.IsInThumbMode());
         }
     }
 
     void CallSVC(u32 swi) override {
-        parent.svc_swi = swi;
-        parent.jit.load()->HaltExecution(SupervisorCall);
+        m_parent.m_svc_swi = swi;
+        m_parent.m_jit->HaltExecution(SupervisorCall);
     }
 
     void AddTicks(u64 ticks) override {
-        if (parent.uses_wall_clock) {
-            return;
-        }
+        ASSERT_MSG(!m_parent.m_uses_wall_clock, "Dynarmic ticking disabled");
 
         // Divide the number of ticks by the amount of CPU cores. TODO(Subv): This yields only a
         // rough approximation of the amount of executed ticks in the system, it may be thrown off
         // if not all cores are doing a similar amount of work. Instead of doing this, we should
         // device a way so that timing is consistent across all cores without increasing the ticks 4
         // times.
-        u64 amortized_ticks =
-            (ticks - num_interpreted_instructions) / Core::Hardware::NUM_CPU_CORES;
+        u64 amortized_ticks = ticks / Core::Hardware::NUM_CPU_CORES;
         // Always execute at least one tick.
         amortized_ticks = std::max<u64>(amortized_ticks, 1);
 
-        parent.system.CoreTiming().AddTicks(amortized_ticks);
-        num_interpreted_instructions = 0;
+        m_parent.m_system.CoreTiming().AddTicks(amortized_ticks);
     }
 
     u64 GetTicksRemaining() override {
-        if (parent.uses_wall_clock) {
-            if (!IsInterrupted()) {
-                return minimum_run_cycles;
-            }
-            return 0U;
-        }
+        ASSERT_MSG(!m_parent.m_uses_wall_clock, "Dynarmic ticking disabled");
 
-        return std::max<s64>(parent.system.CoreTiming().GetDowncount(), 0);
+        return std::max<s64>(m_parent.m_system.CoreTiming().GetDowncount(), 0);
     }
 
     bool CheckMemoryAccess(u64 addr, u64 size, Kernel::DebugWatchpointType type) {
-        if (!check_memory_access) {
+        if (!m_check_memory_access) {
             return true;
         }
 
-        if (!memory.IsValidVirtualAddressRange(addr, size)) {
+        if (!m_memory.IsValidVirtualAddressRange(addr, size)) {
             LOG_CRITICAL(Core_ARM, "Stopping execution due to unmapped memory access at {:#x}",
                          addr);
-            parent.jit.load()->HaltExecution(PrefetchAbort);
+            m_parent.m_jit->HaltExecution(PrefetchAbort);
             return false;
         }
 
-        if (!debugger_enabled) {
+        if (!m_debugger_enabled) {
             return true;
         }
 
-        const auto match{parent.MatchingWatchpoint(addr, size, type)};
+        const auto match{m_parent.MatchingWatchpoint(addr, size, type)};
         if (match) {
-            parent.halted_watchpoint = match;
-            parent.jit.load()->HaltExecution(DataAbort);
+            m_parent.m_halted_watchpoint = match;
+            m_parent.m_jit->HaltExecution(DataAbort);
             return false;
         }
 
@@ -182,32 +161,31 @@ public:
     }
 
     void ReturnException(u32 pc, Dynarmic::HaltReason hr) {
-        parent.SaveContext(parent.breakpoint_context);
-        parent.breakpoint_context.cpu_registers[15] = pc;
-        parent.jit.load()->HaltExecution(hr);
+        m_parent.GetContext(m_parent.m_breakpoint_context);
+        m_parent.m_breakpoint_context.pc = pc;
+        m_parent.m_breakpoint_context.r[15] = pc;
+        m_parent.m_jit->HaltExecution(hr);
     }
 
-    bool IsInterrupted() {
-        return parent.system.Kernel().PhysicalCore(parent.core_index).IsInterrupted();
-    }
-
-    ARM_Dynarmic_32& parent;
-    Core::Memory::Memory& memory;
-    std::size_t num_interpreted_instructions{};
-    const bool debugger_enabled{};
-    const bool check_memory_access{};
-    static constexpr u64 minimum_run_cycles = 10000U;
+    ArmDynarmic32& m_parent;
+    Core::Memory::Memory& m_memory;
+    const Kernel::KProcess* m_process{};
+    const bool m_debugger_enabled{};
+    const bool m_check_memory_access{};
+    static constexpr u64 MinimumRunCycles = 10000U;
 };
 
-std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable* page_table) const {
+std::shared_ptr<Dynarmic::A32::Jit> ArmDynarmic32::MakeJit(Common::PageTable* page_table) const {
     Dynarmic::A32::UserConfig config;
-    config.callbacks = cb.get();
-    config.coprocessors[15] = cp15;
+    config.callbacks = m_cb.get();
+    config.coprocessors[15] = m_cp15;
     config.define_unpredictable_behaviour = true;
-    static constexpr std::size_t YUZU_PAGEBITS = 12;
-    static constexpr std::size_t NUM_PAGE_TABLE_ENTRIES = 1 << (32 - YUZU_PAGEBITS);
+
     if (page_table) {
-        config.page_table = reinterpret_cast<std::array<std::uint8_t*, NUM_PAGE_TABLE_ENTRIES>*>(
+        constexpr size_t PageBits = 12;
+        constexpr size_t NumPageTableEntries = 1 << (32 - PageBits);
+
+        config.page_table = reinterpret_cast<std::array<std::uint8_t*, NumPageTableEntries>*>(
             page_table->pointers.data());
         config.absolute_offset_page_table = true;
         config.page_table_pointer_mask_bits = Common::PageTable::ATTRIBUTE_BITS;
@@ -221,12 +199,12 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
     }
 
     // Multi-process state
-    config.processor_id = core_index;
-    config.global_monitor = &exclusive_monitor.monitor;
+    config.processor_id = m_core_index;
+    config.global_monitor = &m_exclusive_monitor.monitor;
 
     // Timing
-    config.wall_clock_cntpct = uses_wall_clock;
-    config.enable_cycle_counting = true;
+    config.wall_clock_cntpct = m_uses_wall_clock;
+    config.enable_cycle_counting = !m_uses_wall_clock;
 
     // Code cache size
 #ifdef ARCHITECTURE_arm64
@@ -236,7 +214,7 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
 #endif
 
     // Allow memory fault handling to work
-    if (system.DebuggerEnabled()) {
+    if (m_system.DebuggerEnabled()) {
         config.check_halt_on_memory_access = true;
     }
 
@@ -325,137 +303,142 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
     return std::make_unique<Dynarmic::A32::Jit>(config);
 }
 
-HaltReason ARM_Dynarmic_32::RunJit() {
-    return TranslateHaltReason(jit.load()->Run());
+static std::pair<u32, u32> FpscrToFpsrFpcr(u32 fpscr) {
+    // FPSCR bits [31:27] are mapped to FPSR[31:27].
+    // FPSCR bit [7] is mapped to FPSR[7].
+    // FPSCR bits [4:0] are mapped to FPSR[4:0].
+    const u32 nzcv = fpscr & 0xf8000000;
+    const u32 idc = fpscr & 0x80;
+    const u32 fiq = fpscr & 0x1f;
+    const u32 fpsr = nzcv | idc | fiq;
+
+    // FPSCR bits [26:15] are mapped to FPCR[26:15].
+    // FPSCR bits [12:8] are mapped to FPCR[12:8].
+    const u32 round = fpscr & 0x7ff8000;
+    const u32 trap = fpscr & 0x1f00;
+    const u32 fpcr = round | trap;
+
+    return {fpsr, fpcr};
 }
 
-HaltReason ARM_Dynarmic_32::StepJit() {
-    return TranslateHaltReason(jit.load()->Step());
+static u32 FpsrFpcrToFpscr(u64 fpsr, u64 fpcr) {
+    auto [s, c] = FpscrToFpsrFpcr(static_cast<u32>(fpsr | fpcr));
+    return s | c;
 }
 
-u32 ARM_Dynarmic_32::GetSvcNumber() const {
-    return svc_swi;
+bool ArmDynarmic32::IsInThumbMode() const {
+    return (m_jit->Cpsr() & 0x20) != 0;
 }
 
-const Kernel::DebugWatchpoint* ARM_Dynarmic_32::HaltedWatchpoint() const {
-    return halted_watchpoint;
+HaltReason ArmDynarmic32::RunThread(Kernel::KThread* thread) {
+    m_jit->ClearExclusiveState();
+    return TranslateHaltReason(m_jit->Run());
 }
 
-void ARM_Dynarmic_32::RewindBreakpointInstruction() {
-    LoadContext(breakpoint_context);
+HaltReason ArmDynarmic32::StepThread(Kernel::KThread* thread) {
+    m_jit->ClearExclusiveState();
+    return TranslateHaltReason(m_jit->Step());
 }
 
-ARM_Dynarmic_32::ARM_Dynarmic_32(System& system_, bool uses_wall_clock_,
-                                 DynarmicExclusiveMonitor& exclusive_monitor_,
-                                 std::size_t core_index_)
-    : ARM_Interface{system_, uses_wall_clock_}, cb(std::make_unique<DynarmicCallbacks32>(*this)),
-      cp15(std::make_shared<DynarmicCP15>(*this)), core_index{core_index_},
-      exclusive_monitor{exclusive_monitor_}, null_jit{MakeJit(nullptr)}, jit{null_jit.get()} {}
+u32 ArmDynarmic32::GetSvcNumber() const {
+    return m_svc_swi;
+}
 
-ARM_Dynarmic_32::~ARM_Dynarmic_32() = default;
+void ArmDynarmic32::GetSvcArguments(std::span<uint64_t, 8> args) const {
+    Dynarmic::A32::Jit& j = *m_jit;
+    auto& gpr = j.Regs();
 
-void ARM_Dynarmic_32::SetPC(u64 pc) {
-    jit.load()->Regs()[15] = static_cast<u32>(pc);
+    for (size_t i = 0; i < 8; i++) {
+        args[i] = gpr[i];
+    }
 }
 
-u64 ARM_Dynarmic_32::GetPC() const {
-    return jit.load()->Regs()[15];
-}
+void ArmDynarmic32::SetSvcArguments(std::span<const uint64_t, 8> args) {
+    Dynarmic::A32::Jit& j = *m_jit;
+    auto& gpr = j.Regs();
 
-u64 ARM_Dynarmic_32::GetSP() const {
-    return jit.load()->Regs()[13];
+    for (size_t i = 0; i < 8; i++) {
+        gpr[i] = static_cast<u32>(args[i]);
+    }
 }
 
-u64 ARM_Dynarmic_32::GetReg(int index) const {
-    return jit.load()->Regs()[index];
+const Kernel::DebugWatchpoint* ArmDynarmic32::HaltedWatchpoint() const {
+    return m_halted_watchpoint;
 }
 
-void ARM_Dynarmic_32::SetReg(int index, u64 value) {
-    jit.load()->Regs()[index] = static_cast<u32>(value);
+void ArmDynarmic32::RewindBreakpointInstruction() {
+    this->SetContext(m_breakpoint_context);
 }
 
-u128 ARM_Dynarmic_32::GetVectorReg(int index) const {
-    return {};
+ArmDynarmic32::ArmDynarmic32(System& system, bool uses_wall_clock, const Kernel::KProcess* process,
+                             DynarmicExclusiveMonitor& exclusive_monitor, std::size_t core_index)
+    : ArmInterface{uses_wall_clock}, m_system{system}, m_exclusive_monitor{exclusive_monitor},
+      m_cb(std::make_unique<DynarmicCallbacks32>(*this, process)),
+      m_cp15(std::make_shared<DynarmicCP15>(*this)), m_core_index{core_index} {
+    auto& page_table_impl = process->GetPageTable().GetBasePageTable().GetImpl();
+    m_jit = MakeJit(&page_table_impl);
 }
 
-void ARM_Dynarmic_32::SetVectorReg(int index, u128 value) {}
+ArmDynarmic32::~ArmDynarmic32() = default;
 
-u32 ARM_Dynarmic_32::GetPSTATE() const {
-    return jit.load()->Cpsr();
+void ArmDynarmic32::SetTpidrroEl0(u64 value) {
+    m_cp15->uro = static_cast<u32>(value);
 }
 
-void ARM_Dynarmic_32::SetPSTATE(u32 cpsr) {
-    jit.load()->SetCpsr(cpsr);
-}
+void ArmDynarmic32::GetContext(Kernel::Svc::ThreadContext& ctx) const {
+    Dynarmic::A32::Jit& j = *m_jit;
+    auto& gpr = j.Regs();
+    auto& fpr = j.ExtRegs();
 
-u64 ARM_Dynarmic_32::GetTlsAddress() const {
-    return cp15->uro;
-}
+    for (size_t i = 0; i < 16; i++) {
+        ctx.r[i] = gpr[i];
+    }
 
-void ARM_Dynarmic_32::SetTlsAddress(u64 address) {
-    cp15->uro = static_cast<u32>(address);
-}
+    ctx.fp = gpr[11];
+    ctx.sp = gpr[13];
+    ctx.lr = gpr[14];
+    ctx.pc = gpr[15];
+    ctx.pstate = j.Cpsr();
 
-u64 ARM_Dynarmic_32::GetTPIDR_EL0() const {
-    return cp15->uprw;
-}
+    for (size_t i = 0; i < 32; i++) {
+        ctx.v[i] = {fpr[i], 0};
+    }
 
-void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) {
-    cp15->uprw = static_cast<u32>(value);
+    auto [fpsr, fpcr] = FpscrToFpsrFpcr(j.Fpscr());
+    ctx.fpcr = fpcr;
+    ctx.fpsr = fpsr;
+    ctx.tpidr = m_cp15->uprw;
 }
 
-void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) const {
-    Dynarmic::A32::Jit* j = jit.load();
-    ctx.cpu_registers = j->Regs();
-    ctx.extension_registers = j->ExtRegs();
-    ctx.cpsr = j->Cpsr();
-    ctx.fpscr = j->Fpscr();
-}
+void ArmDynarmic32::SetContext(const Kernel::Svc::ThreadContext& ctx) {
+    Dynarmic::A32::Jit& j = *m_jit;
+    auto& gpr = j.Regs();
+    auto& fpr = j.ExtRegs();
 
-void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) {
-    Dynarmic::A32::Jit* j = jit.load();
-    j->Regs() = ctx.cpu_registers;
-    j->ExtRegs() = ctx.extension_registers;
-    j->SetCpsr(ctx.cpsr);
-    j->SetFpscr(ctx.fpscr);
-}
+    for (size_t i = 0; i < 16; i++) {
+        gpr[i] = static_cast<u32>(ctx.r[i]);
+    }
 
-void ARM_Dynarmic_32::SignalInterrupt() {
-    jit.load()->HaltExecution(BreakLoop);
-}
+    j.SetCpsr(ctx.pstate);
 
-void ARM_Dynarmic_32::ClearInterrupt() {
-    jit.load()->ClearHalt(BreakLoop);
-}
+    for (size_t i = 0; i < 32; i++) {
+        fpr[i] = static_cast<u32>(ctx.v[i][0]);
+    }
 
-void ARM_Dynarmic_32::ClearInstructionCache() {
-    jit.load()->ClearCache();
+    j.SetFpscr(FpsrFpcrToFpscr(ctx.fpsr, ctx.fpcr));
+    m_cp15->uprw = static_cast<u32>(ctx.tpidr);
 }
 
-void ARM_Dynarmic_32::InvalidateCacheRange(u64 addr, std::size_t size) {
-    jit.load()->InvalidateCacheRange(static_cast<u32>(addr), size);
+void ArmDynarmic32::SignalInterrupt(Kernel::KThread* thread) {
+    m_jit->HaltExecution(BreakLoop);
 }
 
-void ARM_Dynarmic_32::ClearExclusiveState() {
-    jit.load()->ClearExclusiveState();
+void ArmDynarmic32::ClearInstructionCache() {
+    m_jit->ClearCache();
 }
 
-void ARM_Dynarmic_32::PageTableChanged(Common::PageTable& page_table,
-                                       std::size_t new_address_space_size_in_bits) {
-    ThreadContext32 ctx{};
-    SaveContext(ctx);
-
-    auto key = std::make_pair(&page_table, new_address_space_size_in_bits);
-    auto iter = jit_cache.find(key);
-    if (iter != jit_cache.end()) {
-        jit.store(iter->second.get());
-        LoadContext(ctx);
-        return;
-    }
-    std::shared_ptr new_jit = MakeJit(&page_table);
-    jit.store(new_jit.get());
-    LoadContext(ctx);
-    jit_cache.emplace(key, std::move(new_jit));
+void ArmDynarmic32::InvalidateCacheRange(u64 addr, std::size_t size) {
+    m_jit->InvalidateCacheRange(static_cast<u32>(addr), size);
 }
 
 } // namespace Core
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.h b/src/core/arm/dynarmic/arm_dynarmic_32.h
index 92fb3f836..185ac7cbf 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_32.h
+++ b/src/core/arm/dynarmic/arm_dynarmic_32.h
@@ -3,14 +3,8 @@
 
 #pragma once
 
-#include <atomic>
-#include <memory>
-#include <unordered_map>
-
 #include <dynarmic/interface/A32/a32.h>
-#include <dynarmic/interface/A64/a64.h>
-#include "common/common_types.h"
-#include "common/hash.h"
+
 #include "core/arm/arm_interface.h"
 #include "core/arm/dynarmic/dynarmic_exclusive_monitor.h"
 
@@ -20,89 +14,63 @@ class Memory;
 
 namespace Core {
 
-class CPUInterruptHandler;
 class DynarmicCallbacks32;
 class DynarmicCP15;
-class DynarmicExclusiveMonitor;
 class System;
 
-class ARM_Dynarmic_32 final : public ARM_Interface {
+class ArmDynarmic32 final : public ArmInterface {
 public:
-    ARM_Dynarmic_32(System& system_, bool uses_wall_clock_,
-                    DynarmicExclusiveMonitor& exclusive_monitor_, std::size_t core_index_);
-    ~ARM_Dynarmic_32() override;
-
-    void SetPC(u64 pc) override;
-    u64 GetPC() const override;
-    u64 GetSP() const override;
-    u64 GetReg(int index) const override;
-    void SetReg(int index, u64 value) override;
-    u128 GetVectorReg(int index) const override;
-    void SetVectorReg(int index, u128 value) override;
-    u32 GetPSTATE() const override;
-    void SetPSTATE(u32 pstate) override;
-    u64 GetTlsAddress() const override;
-    void SetTlsAddress(u64 address) override;
-    void SetTPIDR_EL0(u64 value) override;
-    u64 GetTPIDR_EL0() const override;
-
-    bool IsInThumbMode() const {
-        return (GetPSTATE() & 0x20) != 0;
-    }
+    ArmDynarmic32(System& system, bool uses_wall_clock, const Kernel::KProcess* process,
+                  DynarmicExclusiveMonitor& exclusive_monitor, std::size_t core_index);
+    ~ArmDynarmic32() override;
 
     Architecture GetArchitecture() const override {
-        return Architecture::Aarch32;
+        return Architecture::AArch32;
     }
-    void SaveContext(ThreadContext32& ctx) const override;
-    void SaveContext(ThreadContext64& ctx) const override {}
-    void LoadContext(const ThreadContext32& ctx) override;
-    void LoadContext(const ThreadContext64& ctx) override {}
 
-    void SignalInterrupt() override;
-    void ClearInterrupt() override;
-    void ClearExclusiveState() override;
+    bool IsInThumbMode() const;
+
+    HaltReason RunThread(Kernel::KThread* thread) override;
+    HaltReason StepThread(Kernel::KThread* thread) override;
+
+    void GetContext(Kernel::Svc::ThreadContext& ctx) const override;
+    void SetContext(const Kernel::Svc::ThreadContext& ctx) override;
+    void SetTpidrroEl0(u64 value) override;
+
+    void GetSvcArguments(std::span<uint64_t, 8> args) const override;
+    void SetSvcArguments(std::span<const uint64_t, 8> args) override;
+    u32 GetSvcNumber() const override;
 
+    void SignalInterrupt(Kernel::KThread* thread) override;
     void ClearInstructionCache() override;
     void InvalidateCacheRange(u64 addr, std::size_t size) override;
-    void PageTableChanged(Common::PageTable& new_page_table,
-                          std::size_t new_address_space_size_in_bits) override;
 
 protected:
-    HaltReason RunJit() override;
-    HaltReason StepJit() override;
-    u32 GetSvcNumber() const override;
     const Kernel::DebugWatchpoint* HaltedWatchpoint() const override;
     void RewindBreakpointInstruction() override;
 
 private:
-    std::shared_ptr<Dynarmic::A32::Jit> MakeJit(Common::PageTable* page_table) const;
-
-    static std::vector<BacktraceEntry> GetBacktrace(Core::System& system, u64 fp, u64 lr, u64 pc);
-
-    using JitCacheKey = std::pair<Common::PageTable*, std::size_t>;
-    using JitCacheType =
-        std::unordered_map<JitCacheKey, std::shared_ptr<Dynarmic::A32::Jit>, Common::PairHash>;
+    System& m_system;
+    DynarmicExclusiveMonitor& m_exclusive_monitor;
 
+private:
     friend class DynarmicCallbacks32;
     friend class DynarmicCP15;
 
-    std::unique_ptr<DynarmicCallbacks32> cb;
-    JitCacheType jit_cache;
-    std::shared_ptr<DynarmicCP15> cp15;
-    std::size_t core_index;
-    DynarmicExclusiveMonitor& exclusive_monitor;
+    std::shared_ptr<Dynarmic::A32::Jit> MakeJit(Common::PageTable* page_table) const;
 
-    std::shared_ptr<Dynarmic::A32::Jit> null_jit;
+    std::unique_ptr<DynarmicCallbacks32> m_cb{};
+    std::shared_ptr<DynarmicCP15> m_cp15{};
+    std::size_t m_core_index{};
 
-    // A raw pointer here is fine; we never delete Jit instances.
-    std::atomic<Dynarmic::A32::Jit*> jit;
+    std::shared_ptr<Dynarmic::A32::Jit> m_jit{};
 
     // SVC callback
-    u32 svc_swi{};
+    u32 m_svc_swi{};
 
     // Watchpoint info
-    const Kernel::DebugWatchpoint* halted_watchpoint;
-    ThreadContext32 breakpoint_context;
+    const Kernel::DebugWatchpoint* m_halted_watchpoint{};
+    Kernel::Svc::ThreadContext m_breakpoint_context{};
 };
 
 } // namespace Core
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
index 2e3674b6d..dff14756e 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
@@ -1,25 +1,12 @@
 // SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
-#include <cinttypes>
-#include <memory>
-#include <dynarmic/interface/A64/a64.h>
-#include <dynarmic/interface/A64/config.h>
-#include "common/assert.h"
-#include "common/literals.h"
-#include "common/logging/log.h"
-#include "common/page_table.h"
 #include "common/settings.h"
 #include "core/arm/dynarmic/arm_dynarmic.h"
 #include "core/arm/dynarmic/arm_dynarmic_64.h"
 #include "core/arm/dynarmic/dynarmic_exclusive_monitor.h"
-#include "core/core.h"
 #include "core/core_timing.h"
-#include "core/debugger/debugger.h"
-#include "core/hardware_properties.h"
 #include "core/hle/kernel/k_process.h"
-#include "core/hle/kernel/svc.h"
-#include "core/memory.h"
 
 namespace Core {
 
@@ -28,92 +15,92 @@ using namespace Common::Literals;
 
 class DynarmicCallbacks64 : public Dynarmic::A64::UserCallbacks {
 public:
-    explicit DynarmicCallbacks64(ARM_Dynarmic_64& parent_)
-        : parent{parent_}, memory(parent.system.ApplicationMemory()),
-          debugger_enabled{parent.system.DebuggerEnabled()},
-          check_memory_access{debugger_enabled ||
-                              !Settings::values.cpuopt_ignore_memory_aborts.GetValue()} {}
+    explicit DynarmicCallbacks64(ArmDynarmic64& parent, const Kernel::KProcess* process)
+        : m_parent{parent}, m_memory(process->GetMemory()),
+          m_process(process), m_debugger_enabled{parent.m_system.DebuggerEnabled()},
+          m_check_memory_access{m_debugger_enabled ||
+                                !Settings::values.cpuopt_ignore_memory_aborts.GetValue()} {}
 
     u8 MemoryRead8(u64 vaddr) override {
         CheckMemoryAccess(vaddr, 1, Kernel::DebugWatchpointType::Read);
-        return memory.Read8(vaddr);
+        return m_memory.Read8(vaddr);
     }
     u16 MemoryRead16(u64 vaddr) override {
         CheckMemoryAccess(vaddr, 2, Kernel::DebugWatchpointType::Read);
-        return memory.Read16(vaddr);
+        return m_memory.Read16(vaddr);
     }
     u32 MemoryRead32(u64 vaddr) override {
         CheckMemoryAccess(vaddr, 4, Kernel::DebugWatchpointType::Read);
-        return memory.Read32(vaddr);
+        return m_memory.Read32(vaddr);
     }
     u64 MemoryRead64(u64 vaddr) override {
         CheckMemoryAccess(vaddr, 8, Kernel::DebugWatchpointType::Read);
-        return memory.Read64(vaddr);
+        return m_memory.Read64(vaddr);
     }
     Vector MemoryRead128(u64 vaddr) override {
         CheckMemoryAccess(vaddr, 16, Kernel::DebugWatchpointType::Read);
-        return {memory.Read64(vaddr), memory.Read64(vaddr + 8)};
+        return {m_memory.Read64(vaddr), m_memory.Read64(vaddr + 8)};
     }
     std::optional<u32> MemoryReadCode(u64 vaddr) override {
-        if (!memory.IsValidVirtualAddressRange(vaddr, sizeof(u32))) {
+        if (!m_memory.IsValidVirtualAddressRange(vaddr, sizeof(u32))) {
             return std::nullopt;
         }
-        return memory.Read32(vaddr);
+        return m_memory.Read32(vaddr);
     }
 
     void MemoryWrite8(u64 vaddr, u8 value) override {
         if (CheckMemoryAccess(vaddr, 1, Kernel::DebugWatchpointType::Write)) {
-            memory.Write8(vaddr, value);
+            m_memory.Write8(vaddr, value);
         }
     }
     void MemoryWrite16(u64 vaddr, u16 value) override {
         if (CheckMemoryAccess(vaddr, 2, Kernel::DebugWatchpointType::Write)) {
-            memory.Write16(vaddr, value);
+            m_memory.Write16(vaddr, value);
         }
     }
     void MemoryWrite32(u64 vaddr, u32 value) override {
         if (CheckMemoryAccess(vaddr, 4, Kernel::DebugWatchpointType::Write)) {
-            memory.Write32(vaddr, value);
+            m_memory.Write32(vaddr, value);
         }
     }
     void MemoryWrite64(u64 vaddr, u64 value) override {
         if (CheckMemoryAccess(vaddr, 8, Kernel::DebugWatchpointType::Write)) {
-            memory.Write64(vaddr, value);
+            m_memory.Write64(vaddr, value);
         }
     }
     void MemoryWrite128(u64 vaddr, Vector value) override {
         if (CheckMemoryAccess(vaddr, 16, Kernel::DebugWatchpointType::Write)) {
-            memory.Write64(vaddr, value[0]);
-            memory.Write64(vaddr + 8, value[1]);
+            m_memory.Write64(vaddr, value[0]);
+            m_memory.Write64(vaddr + 8, value[1]);
         }
     }
 
     bool MemoryWriteExclusive8(u64 vaddr, std::uint8_t value, std::uint8_t expected) override {
         return CheckMemoryAccess(vaddr, 1, Kernel::DebugWatchpointType::Write) &&
-               memory.WriteExclusive8(vaddr, value, expected);
+               m_memory.WriteExclusive8(vaddr, value, expected);
     }
     bool MemoryWriteExclusive16(u64 vaddr, std::uint16_t value, std::uint16_t expected) override {
         return CheckMemoryAccess(vaddr, 2, Kernel::DebugWatchpointType::Write) &&
-               memory.WriteExclusive16(vaddr, value, expected);
+               m_memory.WriteExclusive16(vaddr, value, expected);
     }
     bool MemoryWriteExclusive32(u64 vaddr, std::uint32_t value, std::uint32_t expected) override {
         return CheckMemoryAccess(vaddr, 4, Kernel::DebugWatchpointType::Write) &&
-               memory.WriteExclusive32(vaddr, value, expected);
+               m_memory.WriteExclusive32(vaddr, value, expected);
     }
     bool MemoryWriteExclusive64(u64 vaddr, std::uint64_t value, std::uint64_t expected) override {
         return CheckMemoryAccess(vaddr, 8, Kernel::DebugWatchpointType::Write) &&
-               memory.WriteExclusive64(vaddr, value, expected);
+               m_memory.WriteExclusive64(vaddr, value, expected);
     }
     bool MemoryWriteExclusive128(u64 vaddr, Vector value, Vector expected) override {
         return CheckMemoryAccess(vaddr, 16, Kernel::DebugWatchpointType::Write) &&
-               memory.WriteExclusive128(vaddr, value, expected);
+               m_memory.WriteExclusive128(vaddr, value, expected);
     }
 
     void InterpreterFallback(u64 pc, std::size_t num_instructions) override {
-        parent.LogBacktrace();
+        m_parent.LogBacktrace(m_process);
         LOG_ERROR(Core_ARM,
                   "Unimplemented instruction @ 0x{:X} for {} instructions (instr = {:08X})", pc,
-                  num_instructions, memory.Read32(pc));
+                  num_instructions, m_memory.Read32(pc));
         ReturnException(pc, PrefetchAbort);
     }
 
@@ -124,11 +111,11 @@ public:
             static constexpr u64 ICACHE_LINE_SIZE = 64;
 
             const u64 cache_line_start = value & ~(ICACHE_LINE_SIZE - 1);
-            parent.system.InvalidateCpuInstructionCacheRange(cache_line_start, ICACHE_LINE_SIZE);
+            m_parent.InvalidateCacheRange(cache_line_start, ICACHE_LINE_SIZE);
             break;
         }
         case Dynarmic::A64::InstructionCacheOperation::InvalidateAllToPoU:
-            parent.system.InvalidateCpuInstructionCaches();
+            m_parent.ClearInstructionCache();
             break;
         case Dynarmic::A64::InstructionCacheOperation::InvalidateAllToPoUInnerSharable:
         default:
@@ -136,7 +123,7 @@ public:
             break;
         }
 
-        parent.jit.load()->HaltExecution(Dynarmic::HaltReason::CacheInvalidation);
+        m_parent.m_jit->HaltExecution(Dynarmic::HaltReason::CacheInvalidation);
     }
 
     void ExceptionRaised(u64 pc, Dynarmic::A64::Exception exception) override {
@@ -152,26 +139,24 @@ public:
             ReturnException(pc, PrefetchAbort);
             return;
         default:
-            if (debugger_enabled) {
+            if (m_debugger_enabled) {
                 ReturnException(pc, InstructionBreakpoint);
                 return;
             }
 
-            parent.LogBacktrace();
+            m_parent.LogBacktrace(m_process);
             LOG_CRITICAL(Core_ARM, "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X})",
-                         static_cast<std::size_t>(exception), pc, memory.Read32(pc));
+                         static_cast<std::size_t>(exception), pc, m_memory.Read32(pc));
         }
     }
 
-    void CallSVC(u32 swi) override {
-        parent.svc_swi = swi;
-        parent.jit.load()->HaltExecution(SupervisorCall);
+    void CallSVC(u32 svc) override {
+        m_parent.m_svc = svc;
+        m_parent.m_jit->HaltExecution(SupervisorCall);
     }
 
     void AddTicks(u64 ticks) override {
-        if (parent.uses_wall_clock) {
-            return;
-        }
+        ASSERT_MSG(!m_parent.m_uses_wall_clock, "Dynarmic ticking disabled");
 
         // Divide the number of ticks by the amount of CPU cores. TODO(Subv): This yields only a
         // rough approximation of the amount of executed ticks in the system, it may be thrown off
@@ -182,44 +167,39 @@ public:
         // Always execute at least one tick.
         amortized_ticks = std::max<u64>(amortized_ticks, 1);
 
-        parent.system.CoreTiming().AddTicks(amortized_ticks);
+        m_parent.m_system.CoreTiming().AddTicks(amortized_ticks);
     }
 
     u64 GetTicksRemaining() override {
-        if (parent.uses_wall_clock) {
-            if (!IsInterrupted()) {
-                return minimum_run_cycles;
-            }
-            return 0U;
-        }
+        ASSERT_MSG(!m_parent.m_uses_wall_clock, "Dynarmic ticking disabled");
 
-        return std::max<s64>(parent.system.CoreTiming().GetDowncount(), 0);
+        return std::max<s64>(m_parent.m_system.CoreTiming().GetDowncount(), 0);
     }
 
     u64 GetCNTPCT() override {
-        return parent.system.CoreTiming().GetClockTicks();
+        return m_parent.m_system.CoreTiming().GetClockTicks();
     }
 
     bool CheckMemoryAccess(u64 addr, u64 size, Kernel::DebugWatchpointType type) {
-        if (!check_memory_access) {
+        if (!m_check_memory_access) {
             return true;
         }
 
-        if (!memory.IsValidVirtualAddressRange(addr, size)) {
+        if (!m_memory.IsValidVirtualAddressRange(addr, size)) {
             LOG_CRITICAL(Core_ARM, "Stopping execution due to unmapped memory access at {:#x}",
                          addr);
-            parent.jit.load()->HaltExecution(PrefetchAbort);
+            m_parent.m_jit->HaltExecution(PrefetchAbort);
             return false;
         }
 
-        if (!debugger_enabled) {
+        if (!m_debugger_enabled) {
             return true;
         }
 
-        const auto match{parent.MatchingWatchpoint(addr, size, type)};
+        const auto match{m_parent.MatchingWatchpoint(addr, size, type)};
         if (match) {
-            parent.halted_watchpoint = match;
-            parent.jit.load()->HaltExecution(DataAbort);
+            m_parent.m_halted_watchpoint = match;
+            m_parent.m_jit->HaltExecution(DataAbort);
             return false;
         }
 
@@ -227,30 +207,27 @@ public:
     }
 
     void ReturnException(u64 pc, Dynarmic::HaltReason hr) {
-        parent.SaveContext(parent.breakpoint_context);
-        parent.breakpoint_context.pc = pc;
-        parent.jit.load()->HaltExecution(hr);
+        m_parent.GetContext(m_parent.m_breakpoint_context);
+        m_parent.m_breakpoint_context.pc = pc;
+        m_parent.m_jit->HaltExecution(hr);
     }
 
-    bool IsInterrupted() {
-        return parent.system.Kernel().PhysicalCore(parent.core_index).IsInterrupted();
-    }
-
-    ARM_Dynarmic_64& parent;
-    Core::Memory::Memory& memory;
-    u64 tpidrro_el0 = 0;
-    u64 tpidr_el0 = 0;
-    const bool debugger_enabled{};
-    const bool check_memory_access{};
-    static constexpr u64 minimum_run_cycles = 10000U;
+    ArmDynarmic64& m_parent;
+    Core::Memory::Memory& m_memory;
+    u64 m_tpidrro_el0{};
+    u64 m_tpidr_el0{};
+    const Kernel::KProcess* m_process{};
+    const bool m_debugger_enabled{};
+    const bool m_check_memory_access{};
+    static constexpr u64 MinimumRunCycles = 10000U;
 };
 
-std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable* page_table,
-                                                             std::size_t address_space_bits) const {
+std::shared_ptr<Dynarmic::A64::Jit> ArmDynarmic64::MakeJit(Common::PageTable* page_table,
+                                                           std::size_t address_space_bits) const {
     Dynarmic::A64::UserConfig config;
 
     // Callbacks
-    config.callbacks = cb.get();
+    config.callbacks = m_cb.get();
 
     // Memory
     if (page_table) {
@@ -271,12 +248,12 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
     }
 
     // Multi-process state
-    config.processor_id = core_index;
-    config.global_monitor = &exclusive_monitor.monitor;
+    config.processor_id = m_core_index;
+    config.global_monitor = &m_exclusive_monitor.monitor;
 
     // System registers
-    config.tpidrro_el0 = &cb->tpidrro_el0;
-    config.tpidr_el0 = &cb->tpidr_el0;
+    config.tpidrro_el0 = &m_cb->m_tpidrro_el0;
+    config.tpidr_el0 = &m_cb->m_tpidr_el0;
     config.dczid_el0 = 4;
     config.ctr_el0 = 0x8444c004;
     config.cntfrq_el0 = Hardware::CNTFREQ;
@@ -285,8 +262,8 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
     config.define_unpredictable_behaviour = true;
 
     // Timing
-    config.wall_clock_cntpct = uses_wall_clock;
-    config.enable_cycle_counting = true;
+    config.wall_clock_cntpct = m_uses_wall_clock;
+    config.enable_cycle_counting = !m_uses_wall_clock;
 
     // Code cache size
 #ifdef ARCHITECTURE_arm64
@@ -296,7 +273,7 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
 #endif
 
     // Allow memory fault handling to work
-    if (system.DebuggerEnabled()) {
+    if (m_system.DebuggerEnabled()) {
         config.check_halt_on_memory_access = true;
     }
 
@@ -384,147 +361,112 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
     return std::make_shared<Dynarmic::A64::Jit>(config);
 }
 
-HaltReason ARM_Dynarmic_64::RunJit() {
-    return TranslateHaltReason(jit.load()->Run());
-}
-
-HaltReason ARM_Dynarmic_64::StepJit() {
-    return TranslateHaltReason(jit.load()->Step());
-}
-
-u32 ARM_Dynarmic_64::GetSvcNumber() const {
-    return svc_swi;
-}
-
-const Kernel::DebugWatchpoint* ARM_Dynarmic_64::HaltedWatchpoint() const {
-    return halted_watchpoint;
-}
-
-void ARM_Dynarmic_64::RewindBreakpointInstruction() {
-    LoadContext(breakpoint_context);
-}
-
-ARM_Dynarmic_64::ARM_Dynarmic_64(System& system_, bool uses_wall_clock_,
-                                 DynarmicExclusiveMonitor& exclusive_monitor_,
-                                 std::size_t core_index_)
-    : ARM_Interface{system_, uses_wall_clock_},
-      cb(std::make_unique<DynarmicCallbacks64>(*this)), core_index{core_index_},
-      exclusive_monitor{exclusive_monitor_}, null_jit{MakeJit(nullptr, 48)}, jit{null_jit.get()} {}
-
-ARM_Dynarmic_64::~ARM_Dynarmic_64() = default;
-
-void ARM_Dynarmic_64::SetPC(u64 pc) {
-    jit.load()->SetPC(pc);
-}
-
-u64 ARM_Dynarmic_64::GetPC() const {
-    return jit.load()->GetPC();
+HaltReason ArmDynarmic64::RunThread(Kernel::KThread* thread) {
+    m_jit->ClearExclusiveState();
+    return TranslateHaltReason(m_jit->Run());
 }
 
-u64 ARM_Dynarmic_64::GetSP() const {
-    return jit.load()->GetSP();
+HaltReason ArmDynarmic64::StepThread(Kernel::KThread* thread) {
+    m_jit->ClearExclusiveState();
+    return TranslateHaltReason(m_jit->Step());
 }
 
-u64 ARM_Dynarmic_64::GetReg(int index) const {
-    return jit.load()->GetRegister(index);
+u32 ArmDynarmic64::GetSvcNumber() const {
+    return m_svc;
 }
 
-void ARM_Dynarmic_64::SetReg(int index, u64 value) {
-    jit.load()->SetRegister(index, value);
-}
+void ArmDynarmic64::GetSvcArguments(std::span<uint64_t, 8> args) const {
+    Dynarmic::A64::Jit& j = *m_jit;
 
-u128 ARM_Dynarmic_64::GetVectorReg(int index) const {
-    return jit.load()->GetVector(index);
+    for (size_t i = 0; i < 8; i++) {
+        args[i] = j.GetRegister(i);
+    }
 }
 
-void ARM_Dynarmic_64::SetVectorReg(int index, u128 value) {
-    jit.load()->SetVector(index, value);
-}
+void ArmDynarmic64::SetSvcArguments(std::span<const uint64_t, 8> args) {
+    Dynarmic::A64::Jit& j = *m_jit;
 
-u32 ARM_Dynarmic_64::GetPSTATE() const {
-    return jit.load()->GetPstate();
+    for (size_t i = 0; i < 8; i++) {
+        j.SetRegister(i, args[i]);
+    }
 }
 
-void ARM_Dynarmic_64::SetPSTATE(u32 pstate) {
-    jit.load()->SetPstate(pstate);
+const Kernel::DebugWatchpoint* ArmDynarmic64::HaltedWatchpoint() const {
+    return m_halted_watchpoint;
 }
 
-u64 ARM_Dynarmic_64::GetTlsAddress() const {
-    return cb->tpidrro_el0;
+void ArmDynarmic64::RewindBreakpointInstruction() {
+    this->SetContext(m_breakpoint_context);
 }
 
-void ARM_Dynarmic_64::SetTlsAddress(u64 address) {
-    cb->tpidrro_el0 = address;
+ArmDynarmic64::ArmDynarmic64(System& system, bool uses_wall_clock, const Kernel::KProcess* process,
+                             DynarmicExclusiveMonitor& exclusive_monitor, std::size_t core_index)
+    : ArmInterface{uses_wall_clock}, m_system{system}, m_exclusive_monitor{exclusive_monitor},
+      m_cb(std::make_unique<DynarmicCallbacks64>(*this, process)), m_core_index{core_index} {
+    auto& page_table = process->GetPageTable().GetBasePageTable();
+    auto& page_table_impl = page_table.GetImpl();
+    m_jit = MakeJit(&page_table_impl, page_table.GetAddressSpaceWidth());
 }
 
-u64 ARM_Dynarmic_64::GetTPIDR_EL0() const {
-    return cb->tpidr_el0;
-}
+ArmDynarmic64::~ArmDynarmic64() = default;
 
-void ARM_Dynarmic_64::SetTPIDR_EL0(u64 value) {
-    cb->tpidr_el0 = value;
+void ArmDynarmic64::SetTpidrroEl0(u64 value) {
+    m_cb->m_tpidrro_el0 = value;
 }
 
-void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) const {
-    Dynarmic::A64::Jit* j = jit.load();
-    ctx.cpu_registers = j->GetRegisters();
-    ctx.sp = j->GetSP();
-    ctx.pc = j->GetPC();
-    ctx.pstate = j->GetPstate();
-    ctx.vector_registers = j->GetVectors();
-    ctx.fpcr = j->GetFpcr();
-    ctx.fpsr = j->GetFpsr();
-    ctx.tpidr = cb->tpidr_el0;
-}
+void ArmDynarmic64::GetContext(Kernel::Svc::ThreadContext& ctx) const {
+    Dynarmic::A64::Jit& j = *m_jit;
+    auto gpr = j.GetRegisters();
+    auto fpr = j.GetVectors();
 
-void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) {
-    Dynarmic::A64::Jit* j = jit.load();
-    j->SetRegisters(ctx.cpu_registers);
-    j->SetSP(ctx.sp);
-    j->SetPC(ctx.pc);
-    j->SetPstate(ctx.pstate);
-    j->SetVectors(ctx.vector_registers);
-    j->SetFpcr(ctx.fpcr);
-    j->SetFpsr(ctx.fpsr);
-    SetTPIDR_EL0(ctx.tpidr);
+    // TODO: this is inconvenient
+    for (size_t i = 0; i < 29; i++) {
+        ctx.r[i] = gpr[i];
+    }
+    ctx.fp = gpr[29];
+    ctx.lr = gpr[30];
+
+    ctx.sp = j.GetSP();
+    ctx.pc = j.GetPC();
+    ctx.pstate = j.GetPstate();
+    ctx.v = fpr;
+    ctx.fpcr = j.GetFpcr();
+    ctx.fpsr = j.GetFpsr();
+    ctx.tpidr = m_cb->m_tpidr_el0;
 }
 
-void ARM_Dynarmic_64::SignalInterrupt() {
-    jit.load()->HaltExecution(BreakLoop);
-}
+void ArmDynarmic64::SetContext(const Kernel::Svc::ThreadContext& ctx) {
+    Dynarmic::A64::Jit& j = *m_jit;
 
-void ARM_Dynarmic_64::ClearInterrupt() {
-    jit.load()->ClearHalt(BreakLoop);
-}
+    // TODO: this is inconvenient
+    std::array<u64, 31> gpr;
 
-void ARM_Dynarmic_64::ClearInstructionCache() {
-    jit.load()->ClearCache();
+    for (size_t i = 0; i < 29; i++) {
+        gpr[i] = ctx.r[i];
+    }
+    gpr[29] = ctx.fp;
+    gpr[30] = ctx.lr;
+
+    j.SetRegisters(gpr);
+    j.SetSP(ctx.sp);
+    j.SetPC(ctx.pc);
+    j.SetPstate(ctx.pstate);
+    j.SetVectors(ctx.v);
+    j.SetFpcr(ctx.fpcr);
+    j.SetFpsr(ctx.fpsr);
+    m_cb->m_tpidr_el0 = ctx.tpidr;
 }
 
-void ARM_Dynarmic_64::InvalidateCacheRange(u64 addr, std::size_t size) {
-    jit.load()->InvalidateCacheRange(addr, size);
+void ArmDynarmic64::SignalInterrupt(Kernel::KThread* thread) {
+    m_jit->HaltExecution(BreakLoop);
 }
 
-void ARM_Dynarmic_64::ClearExclusiveState() {
-    jit.load()->ClearExclusiveState();
+void ArmDynarmic64::ClearInstructionCache() {
+    m_jit->ClearCache();
 }
 
-void ARM_Dynarmic_64::PageTableChanged(Common::PageTable& page_table,
-                                       std::size_t new_address_space_size_in_bits) {
-    ThreadContext64 ctx{};
-    SaveContext(ctx);
-
-    auto key = std::make_pair(&page_table, new_address_space_size_in_bits);
-    auto iter = jit_cache.find(key);
-    if (iter != jit_cache.end()) {
-        jit.store(iter->second.get());
-        LoadContext(ctx);
-        return;
-    }
-    std::shared_ptr new_jit = MakeJit(&page_table, new_address_space_size_in_bits);
-    jit.store(new_jit.get());
-    LoadContext(ctx);
-    jit_cache.emplace(key, std::move(new_jit));
+void ArmDynarmic64::InvalidateCacheRange(u64 addr, std::size_t size) {
+    m_jit->InvalidateCacheRange(addr, size);
 }
 
 } // namespace Core
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.h b/src/core/arm/dynarmic/arm_dynarmic_64.h
index 2b88a08e2..4f3dd026f 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_64.h
+++ b/src/core/arm/dynarmic/arm_dynarmic_64.h
@@ -23,76 +23,55 @@ class DynarmicCallbacks64;
 class DynarmicExclusiveMonitor;
 class System;
 
-class ARM_Dynarmic_64 final : public ARM_Interface {
+class ArmDynarmic64 final : public ArmInterface {
 public:
-    ARM_Dynarmic_64(System& system_, bool uses_wall_clock_,
-                    DynarmicExclusiveMonitor& exclusive_monitor_, std::size_t core_index_);
-    ~ARM_Dynarmic_64() override;
-
-    void SetPC(u64 pc) override;
-    u64 GetPC() const override;
-    u64 GetSP() const override;
-    u64 GetReg(int index) const override;
-    void SetReg(int index, u64 value) override;
-    u128 GetVectorReg(int index) const override;
-    void SetVectorReg(int index, u128 value) override;
-    u32 GetPSTATE() const override;
-    void SetPSTATE(u32 pstate) override;
-    u64 GetTlsAddress() const override;
-    void SetTlsAddress(u64 address) override;
-    void SetTPIDR_EL0(u64 value) override;
-    u64 GetTPIDR_EL0() const override;
+    ArmDynarmic64(System& system, bool uses_wall_clock, const Kernel::KProcess* process,
+                  DynarmicExclusiveMonitor& exclusive_monitor, std::size_t core_index);
+    ~ArmDynarmic64() override;
 
     Architecture GetArchitecture() const override {
-        return Architecture::Aarch64;
+        return Architecture::AArch64;
     }
-    void SaveContext(ThreadContext32& ctx) const override {}
-    void SaveContext(ThreadContext64& ctx) const override;
-    void LoadContext(const ThreadContext32& ctx) override {}
-    void LoadContext(const ThreadContext64& ctx) override;
 
-    void SignalInterrupt() override;
-    void ClearInterrupt() override;
-    void ClearExclusiveState() override;
+    HaltReason RunThread(Kernel::KThread* thread) override;
+    HaltReason StepThread(Kernel::KThread* thread) override;
 
+    void GetContext(Kernel::Svc::ThreadContext& ctx) const override;
+    void SetContext(const Kernel::Svc::ThreadContext& ctx) override;
+    void SetTpidrroEl0(u64 value) override;
+
+    void GetSvcArguments(std::span<uint64_t, 8> args) const override;
+    void SetSvcArguments(std::span<const uint64_t, 8> args) override;
+    u32 GetSvcNumber() const override;
+
+    void SignalInterrupt(Kernel::KThread* thread) override;
     void ClearInstructionCache() override;
     void InvalidateCacheRange(u64 addr, std::size_t size) override;
-    void PageTableChanged(Common::PageTable& new_page_table,
-                          std::size_t new_address_space_size_in_bits) override;
 
 protected:
-    HaltReason RunJit() override;
-    HaltReason StepJit() override;
-    u32 GetSvcNumber() const override;
     const Kernel::DebugWatchpoint* HaltedWatchpoint() const override;
     void RewindBreakpointInstruction() override;
 
 private:
-    std::shared_ptr<Dynarmic::A64::Jit> MakeJit(Common::PageTable* page_table,
-                                                std::size_t address_space_bits) const;
-
-    using JitCacheKey = std::pair<Common::PageTable*, std::size_t>;
-    using JitCacheType =
-        std::unordered_map<JitCacheKey, std::shared_ptr<Dynarmic::A64::Jit>, Common::PairHash>;
+    System& m_system;
+    DynarmicExclusiveMonitor& m_exclusive_monitor;
 
+private:
     friend class DynarmicCallbacks64;
-    std::unique_ptr<DynarmicCallbacks64> cb;
-    JitCacheType jit_cache;
-
-    std::size_t core_index;
-    DynarmicExclusiveMonitor& exclusive_monitor;
 
-    std::shared_ptr<Dynarmic::A64::Jit> null_jit;
+    std::shared_ptr<Dynarmic::A64::Jit> MakeJit(Common::PageTable* page_table,
+                                                std::size_t address_space_bits) const;
+    std::unique_ptr<DynarmicCallbacks64> m_cb{};
+    std::size_t m_core_index{};
 
-    // A raw pointer here is fine; we never delete Jit instances.
-    std::atomic<Dynarmic::A64::Jit*> jit;
+    std::shared_ptr<Dynarmic::A64::Jit> m_jit{};
 
     // SVC callback
-    u32 svc_swi{};
+    u32 m_svc{};
 
-    // Breakpoint info
-    const Kernel::DebugWatchpoint* halted_watchpoint;
-    ThreadContext64 breakpoint_context;
+    // Watchpoint info
+    const Kernel::DebugWatchpoint* m_halted_watchpoint{};
+    Kernel::Svc::ThreadContext m_breakpoint_context{};
 };
 
 } // namespace Core
diff --git a/src/core/arm/dynarmic/dynarmic_cp15.cpp b/src/core/arm/dynarmic/dynarmic_cp15.cpp
index 92c548db0..f3eee0d42 100644
--- a/src/core/arm/dynarmic/dynarmic_cp15.cpp
+++ b/src/core/arm/dynarmic/dynarmic_cp15.cpp
@@ -124,8 +124,8 @@ CallbackOrAccessTwoWords DynarmicCP15::CompileGetTwoWords(bool two, unsigned opc
     if (!two && opc == 0 && CRm == CoprocReg::C14) {
         // CNTPCT
         const auto callback = [](void* arg, u32, u32) -> u64 {
-            const auto& parent_arg = *static_cast<ARM_Dynarmic_32*>(arg);
-            return parent_arg.system.CoreTiming().GetClockTicks();
+            const auto& parent_arg = *static_cast<ArmDynarmic32*>(arg);
+            return parent_arg.m_system.CoreTiming().GetClockTicks();
         };
         return Callback{callback, &parent};
     }
diff --git a/src/core/arm/dynarmic/dynarmic_cp15.h b/src/core/arm/dynarmic/dynarmic_cp15.h
index d90b3e568..f3d96b0d8 100644
--- a/src/core/arm/dynarmic/dynarmic_cp15.h
+++ b/src/core/arm/dynarmic/dynarmic_cp15.h
@@ -10,13 +10,13 @@
 
 namespace Core {
 
-class ARM_Dynarmic_32;
+class ArmDynarmic32;
 
 class DynarmicCP15 final : public Dynarmic::A32::Coprocessor {
 public:
     using CoprocReg = Dynarmic::A32::CoprocReg;
 
-    explicit DynarmicCP15(ARM_Dynarmic_32& parent_) : parent{parent_} {}
+    explicit DynarmicCP15(ArmDynarmic32& parent_) : parent{parent_} {}
 
     std::optional<Callback> CompileInternalOperation(bool two, unsigned opc1, CoprocReg CRd,
                                                      CoprocReg CRn, CoprocReg CRm,
@@ -32,11 +32,11 @@ public:
     std::optional<Callback> CompileStoreWords(bool two, bool long_transfer, CoprocReg CRd,
                                               std::optional<u8> option) override;
 
-    ARM_Dynarmic_32& parent;
+    ArmDynarmic32& parent;
     u32 uprw = 0;
     u32 uro = 0;
 
-    friend class ARM_Dynarmic_32;
+    friend class ArmDynarmic32;
 };
 
 } // namespace Core
diff --git a/src/core/arm/dynarmic/dynarmic_exclusive_monitor.h b/src/core/arm/dynarmic/dynarmic_exclusive_monitor.h
index fbfcd8d95..c4f22ec89 100644
--- a/src/core/arm/dynarmic/dynarmic_exclusive_monitor.h
+++ b/src/core/arm/dynarmic/dynarmic_exclusive_monitor.h
@@ -14,8 +14,8 @@ class Memory;
 
 namespace Core {
 
-class ARM_Dynarmic_32;
-class ARM_Dynarmic_64;
+class ArmDynarmic32;
+class ArmDynarmic64;
 
 class DynarmicExclusiveMonitor final : public ExclusiveMonitor {
 public:
@@ -36,8 +36,8 @@ public:
     bool ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) override;
 
 private:
-    friend class ARM_Dynarmic_32;
-    friend class ARM_Dynarmic_64;
+    friend class ArmDynarmic32;
+    friend class ArmDynarmic64;
     Dynarmic::ExclusiveMonitor monitor;
     Core::Memory::Memory& memory;
 };
diff --git a/src/core/arm/nce/arm_nce.cpp b/src/core/arm/nce/arm_nce.cpp
index f7bdafd39..b42a32a0b 100644
--- a/src/core/arm/nce/arm_nce.cpp
+++ b/src/core/arm/nce/arm_nce.cpp
@@ -6,6 +6,7 @@
 
 #include "common/signal_chain.h"
 #include "core/arm/nce/arm_nce.h"
+#include "core/arm/nce/guest_context.h"
 #include "core/arm/nce/patcher.h"
 #include "core/core.h"
 #include "core/memory.h"
@@ -38,7 +39,7 @@ fpsimd_context* GetFloatingPointState(mcontext_t& host_ctx) {
 
 } // namespace
 
-void* ARM_NCE::RestoreGuestContext(void* raw_context) {
+void* ArmNce::RestoreGuestContext(void* raw_context) {
     // Retrieve the host context.
     auto& host_ctx = static_cast<ucontext_t*>(raw_context)->uc_mcontext;
 
@@ -71,7 +72,7 @@ void* ARM_NCE::RestoreGuestContext(void* raw_context) {
     return tpidr;
 }
 
-void ARM_NCE::SaveGuestContext(GuestContext* guest_ctx, void* raw_context) {
+void ArmNce::SaveGuestContext(GuestContext* guest_ctx, void* raw_context) {
     // Retrieve the host context.
     auto& host_ctx = static_cast<ucontext_t*>(raw_context)->uc_mcontext;
 
@@ -103,7 +104,7 @@ void ARM_NCE::SaveGuestContext(GuestContext* guest_ctx, void* raw_context) {
     host_ctx.regs[0] = guest_ctx->esr_el1.exchange(0);
 }
 
-bool ARM_NCE::HandleGuestFault(GuestContext* guest_ctx, void* raw_info, void* raw_context) {
+bool ArmNce::HandleGuestFault(GuestContext* guest_ctx, void* raw_info, void* raw_context) {
     auto& host_ctx = static_cast<ucontext_t*>(raw_context)->uc_mcontext;
     auto* info = static_cast<siginfo_t*>(raw_info);
 
@@ -134,7 +135,7 @@ bool ARM_NCE::HandleGuestFault(GuestContext* guest_ctx, void* raw_info, void* ra
     // - If we lose the race, then SignalInterrupt will send us a signal we are masking,
     //   and it will do nothing when it is unmasked, as we have already left guest code.
     // - If we win the race, then SignalInterrupt will wait for us to unlock first.
-    auto& thread_params = guest_ctx->parent->running_thread->GetNativeExecutionParameters();
+    auto& thread_params = guest_ctx->parent->m_running_thread->GetNativeExecutionParameters();
     thread_params.lock.store(SpinLockLocked);
 
     // Return to host.
@@ -142,97 +143,93 @@ bool ARM_NCE::HandleGuestFault(GuestContext* guest_ctx, void* raw_info, void* ra
     return false;
 }
 
-void ARM_NCE::HandleHostFault(int sig, void* raw_info, void* raw_context) {
+void ArmNce::HandleHostFault(int sig, void* raw_info, void* raw_context) {
     return g_orig_action.sa_sigaction(sig, static_cast<siginfo_t*>(raw_info), raw_context);
 }
 
-HaltReason ARM_NCE::RunJit() {
-    // Get the thread parameters.
-    // TODO: pass the current thread down from ::Run
-    auto* thread = Kernel::GetCurrentThreadPointer(system.Kernel());
+void ArmNce::LockThread(Kernel::KThread* thread) {
     auto* thread_params = &thread->GetNativeExecutionParameters();
+    LockThreadParameters(thread_params);
+}
 
-    {
-        // Lock our core context.
-        std::scoped_lock lk{lock};
-
-        // We should not be running.
-        ASSERT(running_thread == nullptr);
-
-        // Check if we need to run. If we have already been halted, we are done.
-        u64 halt = guest_ctx.esr_el1.exchange(0);
-        if (halt != 0) {
-            return static_cast<HaltReason>(halt);
-        }
-
-        // Mark that we are running.
-        running_thread = thread;
+void ArmNce::UnlockThread(Kernel::KThread* thread) {
+    auto* thread_params = &thread->GetNativeExecutionParameters();
+    UnlockThreadParameters(thread_params);
+}
 
-        // Acquire the lock on the thread parameters.
-        // This allows us to force synchronization with SignalInterrupt.
-        LockThreadParameters(thread_params);
+HaltReason ArmNce::RunThread(Kernel::KThread* thread) {
+    // Check if we're already interrupted.
+    // If we are, we can just return immediately.
+    HaltReason hr = static_cast<HaltReason>(m_guest_ctx.esr_el1.exchange(0));
+    if (True(hr)) {
+        return hr;
     }
 
+    // Get the thread context.
+    auto* thread_params = &thread->GetNativeExecutionParameters();
+    auto* process = thread->GetOwnerProcess();
+
     // Assign current members.
-    guest_ctx.parent = this;
-    thread_params->native_context = &guest_ctx;
-    thread_params->tpidr_el0 = guest_ctx.tpidr_el0;
-    thread_params->tpidrro_el0 = guest_ctx.tpidrro_el0;
+    m_running_thread = thread;
+    m_guest_ctx.parent = this;
+    thread_params->native_context = &m_guest_ctx;
+    thread_params->tpidr_el0 = m_guest_ctx.tpidr_el0;
+    thread_params->tpidrro_el0 = m_guest_ctx.tpidrro_el0;
     thread_params->is_running = true;
 
-    HaltReason halt{};
-
     // TODO: finding and creating the post handler needs to be locked
     // to deal with dynamic loading of NROs.
-    const auto& post_handlers = system.ApplicationProcess()->GetPostHandlers();
-    if (auto it = post_handlers.find(guest_ctx.pc); it != post_handlers.end()) {
-        halt = ReturnToRunCodeByTrampoline(thread_params, &guest_ctx, it->second);
+    const auto& post_handlers = process->GetPostHandlers();
+    if (auto it = post_handlers.find(m_guest_ctx.pc); it != post_handlers.end()) {
+        hr = ReturnToRunCodeByTrampoline(thread_params, &m_guest_ctx, it->second);
     } else {
-        halt = ReturnToRunCodeByExceptionLevelChange(thread_id, thread_params);
+        hr = ReturnToRunCodeByExceptionLevelChange(m_thread_id, thread_params);
     }
 
     // Unload members.
     // The thread does not change, so we can persist the old reference.
-    guest_ctx.tpidr_el0 = thread_params->tpidr_el0;
+    m_running_thread = nullptr;
+    m_guest_ctx.tpidr_el0 = thread_params->tpidr_el0;
     thread_params->native_context = nullptr;
     thread_params->is_running = false;
 
-    // Unlock the thread parameters.
-    UnlockThreadParameters(thread_params);
-
-    {
-        // Lock the core context.
-        std::scoped_lock lk{lock};
-
-        // On exit, we no longer have an active thread.
-        running_thread = nullptr;
-    }
-
     // Return the halt reason.
-    return halt;
+    return hr;
 }
 
-HaltReason ARM_NCE::StepJit() {
+HaltReason ArmNce::StepThread(Kernel::KThread* thread) {
     return HaltReason::StepThread;
 }
 
-u32 ARM_NCE::GetSvcNumber() const {
-    return guest_ctx.svc_swi;
+u32 ArmNce::GetSvcNumber() const {
+    return m_guest_ctx.svc;
+}
+
+void ArmNce::GetSvcArguments(std::span<uint64_t, 8> args) const {
+    for (size_t i = 0; i < 8; i++) {
+        args[i] = m_guest_ctx.cpu_registers[i];
+    }
+}
+
+void ArmNce::SetSvcArguments(std::span<const uint64_t, 8> args) {
+    for (size_t i = 0; i < 8; i++) {
+        m_guest_ctx.cpu_registers[i] = args[i];
+    }
 }
 
-ARM_NCE::ARM_NCE(System& system_, bool uses_wall_clock_, std::size_t core_index_)
-    : ARM_Interface{system_, uses_wall_clock_}, core_index{core_index_} {
-    guest_ctx.system = &system_;
+ArmNce::ArmNce(System& system, bool uses_wall_clock, std::size_t core_index)
+    : ArmInterface{uses_wall_clock}, m_system{system}, m_core_index{core_index} {
+    m_guest_ctx.system = &m_system;
 }
 
-ARM_NCE::~ARM_NCE() = default;
+ArmNce::~ArmNce() = default;
 
-void ARM_NCE::Initialize() {
-    thread_id = gettid();
+void ArmNce::Initialize() {
+    m_thread_id = gettid();
 
     // Setup our signals
-    static std::once_flag flag;
-    std::call_once(flag, [] {
+    static std::once_flag signals;
+    std::call_once(signals, [] {
         using HandlerType = decltype(sigaction::sa_sigaction);
 
         sigset_t signal_mask;
@@ -244,7 +241,7 @@ void ARM_NCE::Initialize() {
         struct sigaction return_to_run_code_action {};
         return_to_run_code_action.sa_flags = SA_SIGINFO | SA_ONSTACK;
         return_to_run_code_action.sa_sigaction = reinterpret_cast<HandlerType>(
-            &ARM_NCE::ReturnToRunCodeByExceptionLevelChangeSignalHandler);
+            &ArmNce::ReturnToRunCodeByExceptionLevelChangeSignalHandler);
         return_to_run_code_action.sa_mask = signal_mask;
         Common::SigAction(ReturnToRunCodeByExceptionLevelChangeSignal, &return_to_run_code_action,
                           nullptr);
@@ -252,14 +249,13 @@ void ARM_NCE::Initialize() {
         struct sigaction break_from_run_code_action {};
         break_from_run_code_action.sa_flags = SA_SIGINFO | SA_ONSTACK;
         break_from_run_code_action.sa_sigaction =
-            reinterpret_cast<HandlerType>(&ARM_NCE::BreakFromRunCodeSignalHandler);
+            reinterpret_cast<HandlerType>(&ArmNce::BreakFromRunCodeSignalHandler);
         break_from_run_code_action.sa_mask = signal_mask;
         Common::SigAction(BreakFromRunCodeSignal, &break_from_run_code_action, nullptr);
 
         struct sigaction fault_action {};
         fault_action.sa_flags = SA_SIGINFO | SA_ONSTACK | SA_RESTART;
-        fault_action.sa_sigaction =
-            reinterpret_cast<HandlerType>(&ARM_NCE::GuestFaultSignalHandler);
+        fault_action.sa_sigaction = reinterpret_cast<HandlerType>(&ArmNce::GuestFaultSignalHandler);
         fault_action.sa_mask = signal_mask;
         Common::SigAction(GuestFaultSignal, &fault_action, &g_orig_action);
 
@@ -272,111 +268,59 @@ void ARM_NCE::Initialize() {
     });
 }
 
-void ARM_NCE::SetPC(u64 pc) {
-    guest_ctx.pc = pc;
+void ArmNce::SetTpidrroEl0(u64 value) {
+    m_guest_ctx.tpidrro_el0 = value;
 }
 
-u64 ARM_NCE::GetPC() const {
-    return guest_ctx.pc;
-}
-
-u64 ARM_NCE::GetSP() const {
-    return guest_ctx.sp;
-}
-
-u64 ARM_NCE::GetReg(int index) const {
-    return guest_ctx.cpu_registers[index];
-}
-
-void ARM_NCE::SetReg(int index, u64 value) {
-    guest_ctx.cpu_registers[index] = value;
-}
-
-u128 ARM_NCE::GetVectorReg(int index) const {
-    return guest_ctx.vector_registers[index];
-}
-
-void ARM_NCE::SetVectorReg(int index, u128 value) {
-    guest_ctx.vector_registers[index] = value;
-}
-
-u32 ARM_NCE::GetPSTATE() const {
-    return guest_ctx.pstate;
-}
-
-void ARM_NCE::SetPSTATE(u32 pstate) {
-    guest_ctx.pstate = pstate;
-}
-
-u64 ARM_NCE::GetTlsAddress() const {
-    return guest_ctx.tpidrro_el0;
-}
-
-void ARM_NCE::SetTlsAddress(u64 address) {
-    guest_ctx.tpidrro_el0 = address;
-}
-
-u64 ARM_NCE::GetTPIDR_EL0() const {
-    return guest_ctx.tpidr_el0;
-}
-
-void ARM_NCE::SetTPIDR_EL0(u64 value) {
-    guest_ctx.tpidr_el0 = value;
-}
-
-void ARM_NCE::SaveContext(ThreadContext64& ctx) const {
-    ctx.cpu_registers = guest_ctx.cpu_registers;
-    ctx.sp = guest_ctx.sp;
-    ctx.pc = guest_ctx.pc;
-    ctx.pstate = guest_ctx.pstate;
-    ctx.vector_registers = guest_ctx.vector_registers;
-    ctx.fpcr = guest_ctx.fpcr;
-    ctx.fpsr = guest_ctx.fpsr;
-    ctx.tpidr = guest_ctx.tpidr_el0;
+void ArmNce::GetContext(Kernel::Svc::ThreadContext& ctx) const {
+    for (size_t i = 0; i < 29; i++) {
+        ctx.r[i] = m_guest_ctx.cpu_registers[i];
+    }
+    ctx.fp = m_guest_ctx.cpu_registers[29];
+    ctx.lr = m_guest_ctx.cpu_registers[30];
+    ctx.sp = m_guest_ctx.sp;
+    ctx.pc = m_guest_ctx.pc;
+    ctx.pstate = m_guest_ctx.pstate;
+    ctx.v = m_guest_ctx.vector_registers;
+    ctx.fpcr = m_guest_ctx.fpcr;
+    ctx.fpsr = m_guest_ctx.fpsr;
+    ctx.tpidr = m_guest_ctx.tpidr_el0;
 }
 
-void ARM_NCE::LoadContext(const ThreadContext64& ctx) {
-    guest_ctx.cpu_registers = ctx.cpu_registers;
-    guest_ctx.sp = ctx.sp;
-    guest_ctx.pc = ctx.pc;
-    guest_ctx.pstate = ctx.pstate;
-    guest_ctx.vector_registers = ctx.vector_registers;
-    guest_ctx.fpcr = ctx.fpcr;
-    guest_ctx.fpsr = ctx.fpsr;
-    guest_ctx.tpidr_el0 = ctx.tpidr;
+void ArmNce::SetContext(const Kernel::Svc::ThreadContext& ctx) {
+    for (size_t i = 0; i < 29; i++) {
+        m_guest_ctx.cpu_registers[i] = ctx.r[i];
+    }
+    m_guest_ctx.cpu_registers[29] = ctx.fp;
+    m_guest_ctx.cpu_registers[30] = ctx.lr;
+    m_guest_ctx.sp = ctx.sp;
+    m_guest_ctx.pc = ctx.pc;
+    m_guest_ctx.pstate = ctx.pstate;
+    m_guest_ctx.vector_registers = ctx.v;
+    m_guest_ctx.fpcr = ctx.fpcr;
+    m_guest_ctx.fpsr = ctx.fpsr;
+    m_guest_ctx.tpidr_el0 = ctx.tpidr;
 }
 
-void ARM_NCE::SignalInterrupt() {
-    // Lock core context.
-    std::scoped_lock lk{lock};
-
+void ArmNce::SignalInterrupt(Kernel::KThread* thread) {
     // Add break loop condition.
-    guest_ctx.esr_el1.fetch_or(static_cast<u64>(HaltReason::BreakLoop));
-
-    // If there is no thread running, we are done.
-    if (running_thread == nullptr) {
-        return;
-    }
+    m_guest_ctx.esr_el1.fetch_or(static_cast<u64>(HaltReason::BreakLoop));
 
     // Lock the thread context.
-    auto* params = &running_thread->GetNativeExecutionParameters();
+    auto* params = &thread->GetNativeExecutionParameters();
     LockThreadParameters(params);
 
     if (params->is_running) {
         // We should signal to the running thread.
         // The running thread will unlock the thread context.
-        syscall(SYS_tkill, thread_id, BreakFromRunCodeSignal);
+        syscall(SYS_tkill, m_thread_id, BreakFromRunCodeSignal);
     } else {
         // If the thread is no longer running, we have nothing to do.
         UnlockThreadParameters(params);
     }
 }
 
-void ARM_NCE::ClearInterrupt() {
-    guest_ctx.esr_el1 = {};
-}
-
-void ARM_NCE::ClearInstructionCache() {
+void ArmNce::ClearInstructionCache() {
     // TODO: This is not possible to implement correctly on Linux because
     // we do not have any access to ic iallu.
 
@@ -384,17 +328,8 @@ void ARM_NCE::ClearInstructionCache() {
     std::atomic_thread_fence(std::memory_order_seq_cst);
 }
 
-void ARM_NCE::InvalidateCacheRange(u64 addr, std::size_t size) {
+void ArmNce::InvalidateCacheRange(u64 addr, std::size_t size) {
     this->ClearInstructionCache();
 }
 
-void ARM_NCE::ClearExclusiveState() {
-    // No-op.
-}
-
-void ARM_NCE::PageTableChanged(Common::PageTable& page_table,
-                               std::size_t new_address_space_size_in_bits) {
-    // No-op. Page table is never used.
-}
-
 } // namespace Core
diff --git a/src/core/arm/nce/arm_nce.h b/src/core/arm/nce/arm_nce.h
index 5fbd6dbf3..f55c10d1d 100644
--- a/src/core/arm/nce/arm_nce.h
+++ b/src/core/arm/nce/arm_nce.h
@@ -3,11 +3,7 @@
 
 #pragma once
 
-#include <atomic>
-#include <memory>
-#include <span>
-#include <unordered_map>
-#include <vector>
+#include <mutex>
 
 #include "core/arm/arm_interface.h"
 #include "core/arm/nce/guest_context.h"
@@ -20,51 +16,36 @@ namespace Core {
 
 class System;
 
-class ARM_NCE final : public ARM_Interface {
+class ArmNce final : public ArmInterface {
 public:
-    ARM_NCE(System& system_, bool uses_wall_clock_, std::size_t core_index_);
-
-    ~ARM_NCE() override;
+    ArmNce(System& system, bool uses_wall_clock, std::size_t core_index);
+    ~ArmNce() override;
 
     void Initialize() override;
-    void SetPC(u64 pc) override;
-    u64 GetPC() const override;
-    u64 GetSP() const override;
-    u64 GetReg(int index) const override;
-    void SetReg(int index, u64 value) override;
-    u128 GetVectorReg(int index) const override;
-    void SetVectorReg(int index, u128 value) override;
-
-    u32 GetPSTATE() const override;
-    void SetPSTATE(u32 pstate) override;
-    u64 GetTlsAddress() const override;
-    void SetTlsAddress(u64 address) override;
-    void SetTPIDR_EL0(u64 value) override;
-    u64 GetTPIDR_EL0() const override;
 
     Architecture GetArchitecture() const override {
-        return Architecture::Aarch64;
+        return Architecture::AArch64;
     }
 
-    void SaveContext(ThreadContext32& ctx) const override {}
-    void SaveContext(ThreadContext64& ctx) const override;
-    void LoadContext(const ThreadContext32& ctx) override {}
-    void LoadContext(const ThreadContext64& ctx) override;
+    HaltReason RunThread(Kernel::KThread* thread) override;
+    HaltReason StepThread(Kernel::KThread* thread) override;
+
+    void GetContext(Kernel::Svc::ThreadContext& ctx) const override;
+    void SetContext(const Kernel::Svc::ThreadContext& ctx) override;
+    void SetTpidrroEl0(u64 value) override;
 
-    void SignalInterrupt() override;
-    void ClearInterrupt() override;
-    void ClearExclusiveState() override;
+    void GetSvcArguments(std::span<uint64_t, 8> args) const override;
+    void SetSvcArguments(std::span<const uint64_t, 8> args) override;
+    u32 GetSvcNumber() const override;
+
+    void SignalInterrupt(Kernel::KThread* thread) override;
     void ClearInstructionCache() override;
     void InvalidateCacheRange(u64 addr, std::size_t size) override;
-    void PageTableChanged(Common::PageTable& new_page_table,
-                          std::size_t new_address_space_size_in_bits) override;
-
-protected:
-    HaltReason RunJit() override;
-    HaltReason StepJit() override;
 
-    u32 GetSvcNumber() const override;
+    void LockThread(Kernel::KThread* thread) override;
+    void UnlockThread(Kernel::KThread* thread) override;
 
+protected:
     const Kernel::DebugWatchpoint* HaltedWatchpoint() const override {
         return nullptr;
     }
@@ -93,16 +74,15 @@ private:
     static void HandleHostFault(int sig, void* info, void* raw_context);
 
 public:
+    Core::System& m_system;
+
     // Members set on initialization.
-    std::size_t core_index{};
-    pid_t thread_id{-1};
+    std::size_t m_core_index{};
+    pid_t m_thread_id{-1};
 
     // Core context.
-    GuestContext guest_ctx;
-
-    // Thread and invalidation info.
-    std::mutex lock;
-    Kernel::KThread* running_thread{};
+    GuestContext m_guest_ctx{};
+    Kernel::KThread* m_running_thread{};
 };
 
 } // namespace Core
diff --git a/src/core/arm/nce/arm_nce.s b/src/core/arm/nce/arm_nce.s
index b98e09f31..4aeda4740 100644
--- a/src/core/arm/nce/arm_nce.s
+++ b/src/core/arm/nce/arm_nce.s
@@ -8,11 +8,11 @@
     movk    reg, #(((val) >> 0x10) & 0xFFFF), lsl #16
 
 
-/* static HaltReason Core::ARM_NCE::ReturnToRunCodeByTrampoline(void* tpidr, Core::GuestContext* ctx, u64 trampoline_addr) */
-.section    .text._ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm, "ax", %progbits
-.global     _ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm
-.type       _ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm, %function
-_ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm:
+/* static HaltReason Core::ArmNce::ReturnToRunCodeByTrampoline(void* tpidr, Core::GuestContext* ctx, u64 trampoline_addr) */
+.section    .text._ZN4Core6ArmNce27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm, "ax", %progbits
+.global     _ZN4Core6ArmNce27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm
+.type       _ZN4Core6ArmNce27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm, %function
+_ZN4Core6ArmNce27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm:
     /* Back up host sp to x3. */
     /* Back up host tpidr_el0 to x4. */
     mov     x3, sp
@@ -49,11 +49,11 @@ _ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm:
     br      x2
 
 
-/* static HaltReason Core::ARM_NCE::ReturnToRunCodeByExceptionLevelChange(int tid, void* tpidr) */
-.section    .text._ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv, "ax", %progbits
-.global     _ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv
-.type       _ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv, %function
-_ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv:
+/* static HaltReason Core::ArmNce::ReturnToRunCodeByExceptionLevelChange(int tid, void* tpidr) */
+.section    .text._ZN4Core6ArmNce37ReturnToRunCodeByExceptionLevelChangeEiPv, "ax", %progbits
+.global     _ZN4Core6ArmNce37ReturnToRunCodeByExceptionLevelChangeEiPv
+.type       _ZN4Core6ArmNce37ReturnToRunCodeByExceptionLevelChangeEiPv, %function
+_ZN4Core6ArmNce37ReturnToRunCodeByExceptionLevelChangeEiPv:
     /* This jumps to the signal handler, which will restore the entire context. */
     /* On entry, x0 = thread id, which is already in the right place. */
 
@@ -71,17 +71,17 @@ _ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv:
     brk     #1000
 
 
-/* static void Core::ARM_NCE::ReturnToRunCodeByExceptionLevelChangeSignalHandler(int sig, void* info, void* raw_context) */
-.section    .text._ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_, "ax", %progbits
-.global     _ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_
-.type       _ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_, %function
-_ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_:
+/* static void Core::ArmNce::ReturnToRunCodeByExceptionLevelChangeSignalHandler(int sig, void* info, void* raw_context) */
+.section    .text._ZN4Core6ArmNce50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_, "ax", %progbits
+.global     _ZN4Core6ArmNce50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_
+.type       _ZN4Core6ArmNce50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_, %function
+_ZN4Core6ArmNce50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_:
     stp     x29, x30, [sp, #-0x10]!
     mov     x29, sp
 
     /* Call the context restorer with the raw context. */
     mov     x0, x2
-    bl      _ZN4Core7ARM_NCE19RestoreGuestContextEPv
+    bl      _ZN4Core6ArmNce19RestoreGuestContextEPv
 
     /* Save the old value of tpidr_el0. */
     mrs     x8, tpidr_el0
@@ -92,18 +92,18 @@ _ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_:
     msr     tpidr_el0, x0
 
     /* Unlock the context. */
-    bl      _ZN4Core7ARM_NCE22UnlockThreadParametersEPv
+    bl      _ZN4Core6ArmNce22UnlockThreadParametersEPv
 
     /* Returning from here will enter the guest. */
     ldp     x29, x30, [sp], #0x10
     ret
 
 
-/* static void Core::ARM_NCE::BreakFromRunCodeSignalHandler(int sig, void* info, void* raw_context) */
-.section    .text._ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_, "ax", %progbits
-.global     _ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_
-.type       _ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_, %function
-_ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_:
+/* static void Core::ArmNce::BreakFromRunCodeSignalHandler(int sig, void* info, void* raw_context) */
+.section    .text._ZN4Core6ArmNce29BreakFromRunCodeSignalHandlerEiPvS1_, "ax", %progbits
+.global     _ZN4Core6ArmNce29BreakFromRunCodeSignalHandlerEiPvS1_
+.type       _ZN4Core6ArmNce29BreakFromRunCodeSignalHandlerEiPvS1_, %function
+_ZN4Core6ArmNce29BreakFromRunCodeSignalHandlerEiPvS1_:
     /* Check to see if we have the correct TLS magic. */
     mrs     x8, tpidr_el0
     ldr     w9, [x8, #(TpidrEl0TlsMagic)]
@@ -121,7 +121,7 @@ _ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_:
 
     /* Tail call the restorer. */
     mov     x1, x2
-    b       _ZN4Core7ARM_NCE16SaveGuestContextEPNS_12GuestContextEPv
+    b       _ZN4Core6ArmNce16SaveGuestContextEPNS_12GuestContextEPv
 
     /* Returning from here will enter host code. */
 
@@ -130,11 +130,11 @@ _ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_:
     ret
 
 
-/* static void Core::ARM_NCE::GuestFaultSignalHandler(int sig, void* info, void* raw_context) */
-.section    .text._ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_, "ax", %progbits
-.global     _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_
-.type       _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_, %function
-_ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_:
+/* static void Core::ArmNce::GuestFaultSignalHandler(int sig, void* info, void* raw_context) */
+.section    .text._ZN4Core6ArmNce23GuestFaultSignalHandlerEiPvS1_, "ax", %progbits
+.global     _ZN4Core6ArmNce23GuestFaultSignalHandlerEiPvS1_
+.type       _ZN4Core6ArmNce23GuestFaultSignalHandlerEiPvS1_, %function
+_ZN4Core6ArmNce23GuestFaultSignalHandlerEiPvS1_:
     /* Check to see if we have the correct TLS magic. */
     mrs     x8, tpidr_el0
     ldr     w9, [x8, #(TpidrEl0TlsMagic)]
@@ -146,7 +146,7 @@ _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_:
 
     /* Incorrect TLS magic, so this is a host fault. */
     /* Tail call the handler. */
-    b       _ZN4Core7ARM_NCE15HandleHostFaultEiPvS1_
+    b       _ZN4Core6ArmNce15HandleHostFaultEiPvS1_
 
 1:
     /* Correct TLS magic, so this is a guest fault. */
@@ -163,7 +163,7 @@ _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_:
     msr     tpidr_el0, x3
 
     /* Call the handler. */
-    bl       _ZN4Core7ARM_NCE16HandleGuestFaultEPNS_12GuestContextEPvS3_
+    bl       _ZN4Core6ArmNce16HandleGuestFaultEPNS_12GuestContextEPvS3_
 
     /* If the handler returned false, we want to preserve the host tpidr_el0. */
     cbz     x0, 2f
@@ -177,11 +177,11 @@ _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_:
     ret
 
 
-/* static void Core::ARM_NCE::LockThreadParameters(void* tpidr) */
-.section    .text._ZN4Core7ARM_NCE20LockThreadParametersEPv, "ax", %progbits
-.global     _ZN4Core7ARM_NCE20LockThreadParametersEPv
-.type       _ZN4Core7ARM_NCE20LockThreadParametersEPv, %function
-_ZN4Core7ARM_NCE20LockThreadParametersEPv:
+/* static void Core::ArmNce::LockThreadParameters(void* tpidr) */
+.section    .text._ZN4Core6ArmNce20LockThreadParametersEPv, "ax", %progbits
+.global     _ZN4Core6ArmNce20LockThreadParametersEPv
+.type       _ZN4Core6ArmNce20LockThreadParametersEPv, %function
+_ZN4Core6ArmNce20LockThreadParametersEPv:
     /* Offset to lock member. */
     add     x0, x0, #(TpidrEl0Lock)
 
@@ -205,11 +205,11 @@ _ZN4Core7ARM_NCE20LockThreadParametersEPv:
     ret
 
 
-/* static void Core::ARM_NCE::UnlockThreadParameters(void* tpidr) */
-.section    .text._ZN4Core7ARM_NCE22UnlockThreadParametersEPv, "ax", %progbits
-.global     _ZN4Core7ARM_NCE22UnlockThreadParametersEPv
-.type       _ZN4Core7ARM_NCE22UnlockThreadParametersEPv, %function
-_ZN4Core7ARM_NCE22UnlockThreadParametersEPv:
+/* static void Core::ArmNce::UnlockThreadParameters(void* tpidr) */
+.section    .text._ZN4Core6ArmNce22UnlockThreadParametersEPv, "ax", %progbits
+.global     _ZN4Core6ArmNce22UnlockThreadParametersEPv
+.type       _ZN4Core6ArmNce22UnlockThreadParametersEPv, %function
+_ZN4Core6ArmNce22UnlockThreadParametersEPv:
     /* Offset to lock member. */
     add     x0, x0, #(TpidrEl0Lock)
 
diff --git a/src/core/arm/nce/guest_context.h b/src/core/arm/nce/guest_context.h
index 0767a0337..a7eadccce 100644
--- a/src/core/arm/nce/guest_context.h
+++ b/src/core/arm/nce/guest_context.h
@@ -3,6 +3,8 @@
 
 #pragma once
 
+#include <atomic>
+
 #include "common/common_funcs.h"
 #include "common/common_types.h"
 #include "core/arm/arm_interface.h"
@@ -10,7 +12,7 @@
 
 namespace Core {
 
-class ARM_NCE;
+class ArmNce;
 class System;
 
 struct HostContext {
@@ -33,9 +35,9 @@ struct GuestContext {
     u64 tpidr_el0{};
     std::atomic<u64> esr_el1{};
     u32 nzcv{};
-    u32 svc_swi{};
+    u32 svc{};
     System* system{};
-    ARM_NCE* parent{};
+    ArmNce* parent{};
 };
 
 // Verify assembly offsets.
diff --git a/src/core/arm/nce/patcher.cpp b/src/core/arm/nce/patcher.cpp
index ec8527224..f97b909df 100644
--- a/src/core/arm/nce/patcher.cpp
+++ b/src/core/arm/nce/patcher.cpp
@@ -278,7 +278,7 @@ void Patcher::WriteSvcTrampoline(ModuleDestLabel module_dest, u32 svc_id) {
 
     // Store SVC number to execute when we return
     c.MOV(X2, svc_id);
-    c.STR(W2, X1, offsetof(GuestContext, svc_swi));
+    c.STR(W2, X1, offsetof(GuestContext, svc));
 
     // We are calling a SVC. Clear esr_el1 and return it.
     static_assert(std::is_same_v<std::underlying_type_t<HaltReason>, u64>);