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authorLioncash <mathew1800@gmail.com>2014-12-16 08:03:48 +0100
committerLioncash <mathew1800@gmail.com>2014-12-16 09:13:06 +0100
commitd5bcddb77c9922f8345dd4014031662ab17e2b33 (patch)
treebb3642d0b2f7c9ae249111957e74ffee9887b5e9 /src/core/arm
parentarmemu: Join SMUAD, SMUSD, and SMLAD (diff)
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Diffstat (limited to 'src/core/arm')
-rw-r--r--src/core/arm/interpreter/armemu.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp
index 967506f45..e4159ceb0 100644
--- a/src/core/arm/interpreter/armemu.cpp
+++ b/src/core/arm/interpreter/armemu.cpp
@@ -6243,16 +6243,16 @@ L_stm_s_takeabort:
// SMUAD
if ((instr & 0xf0d0) == 0xf010) {
- state->Reg[rd_idx] = (rn_lo * rn_hi) + (rm_lo * rm_hi);
+ state->Reg[rd_idx] = (rn_lo * rm_lo) + (rn_hi * rm_hi);
}
// SMUSD
else if ((instr & 0xf0d0) == 0xf050) {
- state->Reg[rd_idx] = (rn_lo * rn_hi) - (rm_lo * rm_hi);
+ state->Reg[rd_idx] = (rn_lo * rm_lo) - (rn_hi * rm_hi);
}
// SMLAD
else {
const u8 ra_idx = BITS(12, 15);
- state->Reg[rd_idx] = (rn_lo * rn_hi) + (rm_lo * rm_hi) + (s32)state->Reg[ra_idx];
+ state->Reg[rd_idx] = (rn_lo * rm_lo) + (rn_hi * rm_hi) + (s32)state->Reg[ra_idx];
}
return 1;
} else {