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authorReinUsesLisp <reinuseslisp@airmail.cc>2021-04-12 00:16:47 +0200
committerameerj <52414509+ameerj@users.noreply.github.com>2021-07-23 03:51:27 +0200
commit2ed80f6b1e85823d7a13dfbb119545a0a0ec7427 (patch)
tree5025ced89b185ae325f0c490699889a2b8dad415 /src/shader_recompiler/frontend
parentshader: Implement SR_THREAD_KILL (diff)
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Diffstat (limited to 'src/shader_recompiler/frontend')
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation.cpp14
1 files changed, 11 insertions, 3 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation.cpp
index 89e5cd6de..92cd27ed4 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation.cpp
@@ -44,9 +44,6 @@ void LOP(TranslatorVisitor& v, u64 insn, IR::U32 op_b, bool x, bool cc, bool inv
if (x) {
throw NotImplementedException("X");
}
- if (cc) {
- throw NotImplementedException("CC");
- }
IR::U32 op_a{v.X(lop.src_reg)};
if (inv_a != 0) {
op_a = v.ir.BitwiseNot(op_a);
@@ -60,6 +57,17 @@ void LOP(TranslatorVisitor& v, u64 insn, IR::U32 op_b, bool x, bool cc, bool inv
const IR::U1 pred_result{PredicateOperation(v.ir, result, *pred_op)};
v.ir.SetPred(dest_pred, pred_result);
}
+ if (cc) {
+ if (bit_op == LogicalOp::PASS_B) {
+ v.SetZFlag(v.ir.IEqual(result, v.ir.Imm32(0)));
+ v.SetSFlag(v.ir.ILessThan(result, v.ir.Imm32(0), true));
+ } else {
+ v.SetZFlag(v.ir.GetZeroFromOp(result));
+ v.SetSFlag(v.ir.GetSignFromOp(result));
+ }
+ v.ResetCFlag();
+ v.ResetOFlag();
+ }
v.X(lop.dest_reg, result);
}