diff options
| author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-07-26 02:27:21 +0200 |
|---|---|---|
| committer | Fernando Sahmkow <fsahmkow27@gmail.com> | 2021-11-16 22:11:28 +0100 |
| commit | 95761cc6a70987b2625d68c4d9da4e2622f57808 (patch) | |
| tree | 6bb64646fe8a4bc2741d260526be61b8f954dce2 /src/shader_recompiler/frontend | |
| parent | common/settings: Remove unused scaling options (diff) | |
| download | yuzu-95761cc6a70987b2625d68c4d9da4e2622f57808.tar yuzu-95761cc6a70987b2625d68c4d9da4e2622f57808.tar.gz yuzu-95761cc6a70987b2625d68c4d9da4e2622f57808.tar.bz2 yuzu-95761cc6a70987b2625d68c4d9da4e2622f57808.tar.lz yuzu-95761cc6a70987b2625d68c4d9da4e2622f57808.tar.xz yuzu-95761cc6a70987b2625d68c4d9da4e2622f57808.tar.zst yuzu-95761cc6a70987b2625d68c4d9da4e2622f57808.zip | |
Diffstat (limited to 'src/shader_recompiler/frontend')
| -rw-r--r-- | src/shader_recompiler/frontend/ir/ir_emitter.cpp | 4 | ||||
| -rw-r--r-- | src/shader_recompiler/frontend/ir/ir_emitter.h | 1 | ||||
| -rw-r--r-- | src/shader_recompiler/frontend/ir/opcodes.inc | 2 |
3 files changed, 7 insertions, 0 deletions
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp index 9ae5da2a1..3dfba8e71 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp +++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp @@ -1145,6 +1145,10 @@ U32 IREmitter::IMul(const U32& a, const U32& b) { return Inst<U32>(Opcode::IMul32, a, b); } +U32 IREmitter::IDiv(const U32& a, const U32& b, bool is_signed) { + return Inst<U32>(is_signed ? Opcode::SDiv32 : Opcode::UDiv32, a, b); +} + U32U64 IREmitter::INeg(const U32U64& value) { switch (value.Type()) { case Type::U32: diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h index 0c664d2fe..1959be42e 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.h +++ b/src/shader_recompiler/frontend/ir/ir_emitter.h @@ -209,6 +209,7 @@ public: [[nodiscard]] U32U64 IAdd(const U32U64& a, const U32U64& b); [[nodiscard]] U32U64 ISub(const U32U64& a, const U32U64& b); [[nodiscard]] U32 IMul(const U32& a, const U32& b); + [[nodiscard]] U32 IDiv(const U32& a, const U32& b, bool is_signed = false); [[nodiscard]] U32U64 INeg(const U32U64& value); [[nodiscard]] U32 IAbs(const U32& value); [[nodiscard]] U32U64 ShiftLeftLogical(const U32U64& base, const U32& shift); diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc index 72751c5a0..c05e6d312 100644 --- a/src/shader_recompiler/frontend/ir/opcodes.inc +++ b/src/shader_recompiler/frontend/ir/opcodes.inc @@ -287,6 +287,8 @@ OPCODE(IAdd64, U64, U64, OPCODE(ISub32, U32, U32, U32, ) OPCODE(ISub64, U64, U64, U64, ) OPCODE(IMul32, U32, U32, U32, ) +OPCODE(SDiv32, U32, U32, U32, ) +OPCODE(UDiv32, U32, U32, U32, ) OPCODE(INeg32, U32, U32, ) OPCODE(INeg64, U64, U64, ) OPCODE(IAbs32, U32, U32, ) |