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-rw-r--r--src/core/arm/dynarmic/arm_dynarmic_32.cpp5
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic_64.cpp8
-rw-r--r--src/core/memory.cpp14
3 files changed, 21 insertions, 6 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
index fb128f735..c8f6dc765 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
@@ -144,7 +144,7 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
// Code cache size
config.code_cache_size = 512 * 1024 * 1024;
- config.far_code_offset = 256 * 1024 * 1024;
+ config.far_code_offset = 400 * 1024 * 1024;
// Safe optimizations
if (Settings::values.cpu_accuracy.GetValue() == Settings::CPUAccuracy::DebugMode) {
@@ -172,6 +172,9 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
if (!Settings::values.cpuopt_reduce_misalign_checks) {
config.only_detect_misalignment_via_page_table_on_page_boundary = false;
}
+ if (!Settings::values.cpuopt_fastmem) {
+ config.fastmem_pointer = nullptr;
+ }
}
// Unsafe optimizations
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
index b0ac8cf8a..ba524cd05 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
@@ -185,7 +185,7 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
// Code cache size
config.code_cache_size = 512 * 1024 * 1024;
- config.far_code_offset = 256 * 1024 * 1024;
+ config.far_code_offset = 400 * 1024 * 1024;
// Safe optimizations
if (Settings::values.cpu_accuracy.GetValue() == Settings::CPUAccuracy::DebugMode) {
@@ -213,6 +213,9 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
if (!Settings::values.cpuopt_reduce_misalign_checks) {
config.only_detect_misalignment_via_page_table_on_page_boundary = false;
}
+ if (!Settings::values.cpuopt_fastmem) {
+ config.fastmem_pointer = nullptr;
+ }
}
// Unsafe optimizations
@@ -227,6 +230,9 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
if (Settings::values.cpuopt_unsafe_inaccurate_nan.GetValue()) {
config.optimizations |= Dynarmic::OptimizationFlag::Unsafe_InaccurateNaN;
}
+ if (Settings::values.cpuopt_unsafe_fastmem_check.GetValue()) {
+ config.fastmem_address_space_bits = 64;
+ }
}
return std::make_shared<Dynarmic::A64::Jit>(config);
diff --git a/src/core/memory.cpp b/src/core/memory.cpp
index 79468e4dc..f285c6f63 100644
--- a/src/core/memory.cpp
+++ b/src/core/memory.cpp
@@ -47,7 +47,9 @@ struct Memory::Impl {
"Out of bounds target: {:016X}", target);
MapPages(page_table, base / PAGE_SIZE, size / PAGE_SIZE, target, Common::PageType::Memory);
- system.DeviceMemory().buffer.Map(base, target - DramMemoryMap::Base, size);
+ if (Settings::IsFastmemEnabled()) {
+ system.DeviceMemory().buffer.Map(base, target - DramMemoryMap::Base, size);
+ }
}
void UnmapRegion(Common::PageTable& page_table, VAddr base, u64 size) {
@@ -55,7 +57,9 @@ struct Memory::Impl {
ASSERT_MSG((base & PAGE_MASK) == 0, "non-page aligned base: {:016X}", base);
MapPages(page_table, base / PAGE_SIZE, size / PAGE_SIZE, 0, Common::PageType::Unmapped);
- system.DeviceMemory().buffer.Unmap(base, size);
+ if (Settings::IsFastmemEnabled()) {
+ system.DeviceMemory().buffer.Unmap(base, size);
+ }
}
bool IsValidVirtualAddress(const Kernel::KProcess& process, const VAddr vaddr) const {
@@ -475,8 +479,10 @@ struct Memory::Impl {
return;
}
- const bool is_read_enable = Settings::IsGPULevelHigh() || !cached;
- system.DeviceMemory().buffer.Protect(vaddr, size, is_read_enable, !cached);
+ if (Settings::IsFastmemEnabled()) {
+ const bool is_read_enable = Settings::IsGPULevelHigh() || !cached;
+ system.DeviceMemory().buffer.Protect(vaddr, size, is_read_enable, !cached);
+ }
// Iterate over a contiguous CPU address space, which corresponds to the specified GPU
// address space, marking the region as un/cached. The region is marked un/cached at a