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-rw-r--r--src/shader_recompiler/backend/spirv/emit_context.cpp40
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.cpp4
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.h4
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp37
-rw-r--r--src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp22
5 files changed, 54 insertions, 53 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_context.cpp b/src/shader_recompiler/backend/spirv/emit_context.cpp
index e22bb5371..2d39ea373 100644
--- a/src/shader_recompiler/backend/spirv/emit_context.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_context.cpp
@@ -314,7 +314,7 @@ void EmitContext::DefineSharedMemory(const IR::Program& program) {
}
void EmitContext::DefineAttributeMemAccess(const Info& info) {
- const auto make_load{[&]() {
+ const auto make_load{[&] {
const Id end_block{OpLabel()};
const Id default_label{OpLabel()};
@@ -322,9 +322,9 @@ void EmitContext::DefineAttributeMemAccess(const Info& info) {
const Id func{OpFunction(F32[1], spv::FunctionControlMask::MaskNone, func_type_load)};
const Id offset{OpFunctionParameter(U32[1])};
AddLabel();
- const Id base_index{OpShiftRightLogical(U32[1], offset, Constant(U32[1], 2U))};
+ const Id base_index{OpShiftRightArithmetic(U32[1], offset, Constant(U32[1], 2U))};
const Id masked_index{OpBitwiseAnd(U32[1], base_index, Constant(U32[1], 3U))};
- const Id compare_index{OpShiftRightLogical(U32[1], base_index, Constant(U32[1], 2U))};
+ const Id compare_index{OpShiftRightArithmetic(U32[1], base_index, Constant(U32[1], 2U))};
std::vector<Sirit::Literal> literals;
std::vector<Id> labels;
if (info.loads_position) {
@@ -343,22 +343,22 @@ void EmitContext::DefineAttributeMemAccess(const Info& info) {
OpSwitch(compare_index, default_label, literals, labels);
AddLabel(default_label);
OpReturnValue(Constant(F32[1], 0.0f));
- size_t label_index = 0;
+ size_t label_index{0};
if (info.loads_position) {
AddLabel(labels[label_index]);
const Id result{OpLoad(F32[1], OpAccessChain(input_f32, input_position, masked_index))};
OpReturnValue(result);
- label_index++;
+ ++label_index;
}
- for (u32 i = 0; i < info.input_generics.size(); i++) {
+ for (size_t i = 0; i < info.input_generics.size(); i++) {
if (!info.input_generics[i].used) {
continue;
}
AddLabel(labels[label_index]);
- const auto type{AttrTypes(*this, i)};
+ const auto type{AttrTypes(*this, static_cast<u32>(i))};
if (!type) {
OpReturnValue(Constant(F32[1], 0.0f));
- label_index++;
+ ++label_index;
continue;
}
const Id generic_id{input_generics.at(i)};
@@ -366,14 +366,14 @@ void EmitContext::DefineAttributeMemAccess(const Info& info) {
const Id value{OpLoad(type->id, pointer)};
const Id result{type->needs_cast ? OpBitcast(F32[1], value) : value};
OpReturnValue(result);
- label_index++;
+ ++label_index;
}
AddLabel(end_block);
OpUnreachable();
OpFunctionEnd();
return func;
}};
- const auto make_store{[&]() {
+ const auto make_store{[&] {
const Id end_block{OpLabel()};
const Id default_label{OpLabel()};
@@ -382,9 +382,9 @@ void EmitContext::DefineAttributeMemAccess(const Info& info) {
const Id offset{OpFunctionParameter(U32[1])};
const Id store_value{OpFunctionParameter(F32[1])};
AddLabel();
- const Id base_index{OpShiftRightLogical(U32[1], offset, Constant(U32[1], 2U))};
+ const Id base_index{OpShiftRightArithmetic(U32[1], offset, Constant(U32[1], 2U))};
const Id masked_index{OpBitwiseAnd(U32[1], base_index, Constant(U32[1], 3U))};
- const Id compare_index{OpShiftRightLogical(U32[1], base_index, Constant(U32[1], 2U))};
+ const Id compare_index{OpShiftRightArithmetic(U32[1], base_index, Constant(U32[1], 2U))};
std::vector<Sirit::Literal> literals;
std::vector<Id> labels;
if (info.stores_position) {
@@ -392,11 +392,11 @@ void EmitContext::DefineAttributeMemAccess(const Info& info) {
labels.push_back(OpLabel());
}
const u32 base_attribute_value = static_cast<u32>(IR::Attribute::Generic0X) >> 2;
- for (u32 i = 0; i < info.stores_generics.size(); i++) {
+ for (size_t i = 0; i < info.stores_generics.size(); i++) {
if (!info.stores_generics[i]) {
continue;
}
- literals.push_back(base_attribute_value + i);
+ literals.push_back(base_attribute_value + static_cast<u32>(i));
labels.push_back(OpLabel());
}
if (info.stores_clip_distance) {
@@ -409,15 +409,15 @@ void EmitContext::DefineAttributeMemAccess(const Info& info) {
OpSwitch(compare_index, default_label, literals, labels);
AddLabel(default_label);
OpReturn();
- size_t label_index = 0;
+ size_t label_index{0};
if (info.stores_position) {
AddLabel(labels[label_index]);
const Id pointer{OpAccessChain(output_f32, output_position, masked_index)};
OpStore(pointer, store_value);
OpReturn();
- label_index++;
+ ++label_index;
}
- for (u32 i = 0; i < info.stores_generics.size(); i++) {
+ for (size_t i = 0; i < info.stores_generics.size(); i++) {
if (!info.stores_generics[i]) {
continue;
}
@@ -426,20 +426,20 @@ void EmitContext::DefineAttributeMemAccess(const Info& info) {
const Id pointer{OpAccessChain(output_f32, generic_id, masked_index)};
OpStore(pointer, store_value);
OpReturn();
- label_index++;
+ ++label_index;
}
if (info.stores_clip_distance) {
AddLabel(labels[label_index]);
const Id pointer{OpAccessChain(output_f32, clip_distances, masked_index)};
OpStore(pointer, store_value);
OpReturn();
- label_index++;
+ ++label_index;
AddLabel(labels[label_index]);
const Id fixed_index{OpIAdd(U32[1], masked_index, Constant(U32[1], 4))};
const Id pointer2{OpAccessChain(output_f32, clip_distances, fixed_index)};
OpStore(pointer2, store_value);
OpReturn();
- label_index++;
+ ++label_index;
}
AddLabel(end_block);
OpUnreachable();
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index e4e9b260c..13eb2de4c 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -307,11 +307,11 @@ void IREmitter::SetAttribute(IR::Attribute attribute, const F32& value) {
Inst(Opcode::SetAttribute, attribute, value);
}
-F32 IREmitter::GetAttributeIndexed(IR::U32 phys_address) {
+F32 IREmitter::GetAttributeIndexed(const U32& phys_address) {
return Inst<F32>(Opcode::GetAttributeIndexed, phys_address);
}
-void IREmitter::SetAttributeIndexed(IR::U32 phys_address, const F32& value) {
+void IREmitter::SetAttributeIndexed(const U32& phys_address, const F32& value) {
Inst(Opcode::SetAttributeIndexed, phys_address, value);
}
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h
index afa8bd924..2cab1dc5d 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.h
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.h
@@ -76,8 +76,8 @@ public:
[[nodiscard]] F32 GetAttribute(IR::Attribute attribute);
void SetAttribute(IR::Attribute attribute, const F32& value);
- [[nodiscard]] F32 GetAttributeIndexed(IR::U32 phys_address);
- void SetAttributeIndexed(IR::U32 phys_address, const F32& value);
+ [[nodiscard]] F32 GetAttributeIndexed(const U32& phys_address);
+ void SetAttributeIndexed(const U32& phys_address, const F32& value);
void SetFragColor(u32 index, u32 component, const F32& value);
void SetFragDepth(const F32& value);
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp
index 0d248c020..f629e7167 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp
@@ -44,6 +44,17 @@ u32 NumElements(Size size) {
}
throw InvalidArgument("Invalid size {}", size);
}
+
+template <typename F>
+void HandleIndexed(TranslatorVisitor& v, IR::Reg index_reg, u32 num_elements, F&& f) {
+ const IR::U32 index_value{v.X(index_reg)};
+ for (u32 element = 0; element < num_elements; ++element) {
+ const IR::U32 final_offset{
+ element == 0 ? index_value : IR::U32{v.ir.IAdd(index_value, v.ir.Imm32(element * 4U))}};
+ f(element, final_offset);
+ }
+}
+
} // Anonymous namespace
void TranslatorVisitor::ALD(u64 insn) {
@@ -70,18 +81,15 @@ void TranslatorVisitor::ALD(u64 insn) {
throw NotImplementedException("Unaligned absolute offset {}", offset);
}
const u32 num_elements{NumElements(ald.size)};
- if (ald.index_reg != IR::Reg::RZ) {
- const IR::U32 index_value = X(ald.index_reg);
+ if (ald.index_reg == IR::Reg::RZ) {
for (u32 element = 0; element < num_elements; ++element) {
- const IR::U32 final_offset =
- element == 0 ? index_value : IR::U32{ir.IAdd(index_value, ir.Imm32(element * 4U))};
- F(ald.dest_reg + element, ir.GetAttributeIndexed(final_offset));
+ F(ald.dest_reg + element, ir.GetAttribute(IR::Attribute{offset / 4 + element}));
}
return;
}
- for (u32 element = 0; element < num_elements; ++element) {
- F(ald.dest_reg + element, ir.GetAttribute(IR::Attribute{offset / 4 + element}));
- }
+ HandleIndexed(*this, ald.index_reg, num_elements, [&](u32 element, IR::U32 final_offset) {
+ F(ald.dest_reg + element, ir.GetAttributeIndexed(final_offset));
+ });
}
void TranslatorVisitor::AST(u64 insn) {
@@ -110,18 +118,15 @@ void TranslatorVisitor::AST(u64 insn) {
throw NotImplementedException("Unaligned absolute offset {}", offset);
}
const u32 num_elements{NumElements(ast.size)};
- if (ast.index_reg != IR::Reg::RZ) {
- const IR::U32 index_value = X(ast.index_reg);
+ if (ast.index_reg == IR::Reg::RZ) {
for (u32 element = 0; element < num_elements; ++element) {
- const IR::U32 final_offset =
- element == 0 ? index_value : IR::U32{ir.IAdd(index_value, ir.Imm32(element * 4U))};
- ir.SetAttributeIndexed(final_offset, F(ast.src_reg + element));
+ ir.SetAttribute(IR::Attribute{offset / 4 + element}, F(ast.src_reg + element));
}
return;
}
- for (u32 element = 0; element < num_elements; ++element) {
- ir.SetAttribute(IR::Attribute{offset / 4 + element}, F(ast.src_reg + element));
- }
+ HandleIndexed(*this, ast.index_reg, num_elements, [&](u32 element, IR::U32 final_offset) {
+ ir.SetAttributeIndexed(final_offset, F(ast.src_reg + element));
+ });
}
void TranslatorVisitor::IPA(u64 insn) {
diff --git a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
index a14465598..1c03ee82a 100644
--- a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
+++ b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
@@ -511,37 +511,33 @@ void Visit(Info& info, IR::Inst& inst) {
}
void GatherInfoFromHeader(Environment& env, Info& info) {
- auto stage = env.ShaderStage();
+ Stage stage{env.ShaderStage()};
if (stage == Stage::Compute) {
return;
}
- const auto& header = env.SPH();
+ const auto& header{env.SPH()};
if (stage == Stage::Fragment) {
if (!info.loads_indexed_attributes) {
return;
}
for (size_t i = 0; i < info.input_generics.size(); i++) {
- info.input_generics[i].used =
- info.input_generics[i].used || header.ps.IsGenericVectorActive(i);
+ info.input_generics[i].used |= header.ps.IsGenericVectorActive(i);
}
- info.loads_position = info.loads_position || header.ps.imap_systemb.position != 0;
+ info.loads_position |= header.ps.imap_systemb.position != 0;
return;
}
if (info.loads_indexed_attributes) {
for (size_t i = 0; i < info.input_generics.size(); i++) {
- info.input_generics[i].used =
- info.input_generics[i].used || header.vtg.IsInputGenericVectorActive(i);
+ info.input_generics[i].used |= header.vtg.IsInputGenericVectorActive(i);
}
+ info.loads_position |= header.vtg.imap_systemb.position != 0;
}
if (info.stores_indexed_attributes) {
- info.loads_position = info.loads_position || header.vtg.imap_systemb.position != 0;
for (size_t i = 0; i < info.stores_generics.size(); i++) {
- info.stores_generics[i] =
- info.stores_generics[i] || header.vtg.IsOutputGenericVectorActive(i);
+ info.stores_generics[i] |= header.vtg.IsOutputGenericVectorActive(i);
}
- info.stores_clip_distance =
- info.stores_clip_distance || header.vtg.omap_systemc.clip_distances != 0;
- info.stores_position = info.stores_position || header.vtg.omap_systemb.position != 0;
+ info.stores_clip_distance |= header.vtg.omap_systemc.clip_distances != 0;
+ info.stores_position |= header.vtg.omap_systemb.position != 0;
}
}