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-rw-r--r--src/video_core/command_processor.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/video_core/command_processor.cpp b/src/video_core/command_processor.cpp
index b7c32035e..c80c96762 100644
--- a/src/video_core/command_processor.cpp
+++ b/src/video_core/command_processor.cpp
@@ -52,10 +52,6 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
if (id >= regs.NumIds())
return;
- // If we're skipping this frame, only allow trigger IRQ
- if (GPU::g_skip_frame && id != PICA_REG_INDEX(trigger_irq))
- return;
-
// TODO: Figure out how register masking acts on e.g. vs.uniform_setup.set_value
u32 old_value = regs[id];