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-rw-r--r--src/video_core/shader/shader_ir.cpp19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/video_core/shader/shader_ir.cpp b/src/video_core/shader/shader_ir.cpp
index 4474af7c4..d7747103e 100644
--- a/src/video_core/shader/shader_ir.cpp
+++ b/src/video_core/shader/shader_ir.cpp
@@ -7,6 +7,7 @@
#include "common/assert.h"
#include "common/common_types.h"
+#include "common/logging/log.h"
#include "video_core/engines/shader_bytecode.h"
#include "video_core/shader/shader_ir.h"
@@ -356,6 +357,24 @@ void ShaderIR::SetTemporal(BasicBlock& bb, u32 id, Node value) {
SetRegister(bb, Register::ZeroIndex + 1 + id, value);
}
+void ShaderIR::SetInternalFlagsFromFloat(BasicBlock& bb, Node value, bool sets_cc) {
+ if (!sets_cc) {
+ return;
+ }
+ const Node zerop = Operation(OperationCode::LogicalFEqual, value, Immediate(0.0f));
+ SetInternalFlag(bb, InternalFlag::Zero, zerop);
+ LOG_WARNING(HW_GPU, "Condition codes implementation is incomplete");
+}
+
+void ShaderIR::SetInternalFlagsFromInteger(BasicBlock& bb, Node value, bool sets_cc) {
+ if (!sets_cc) {
+ return;
+ }
+ const Node zerop = Operation(OperationCode::LogicalIEqual, value, Immediate(0));
+ SetInternalFlag(bb, InternalFlag::Zero, zerop);
+ LOG_WARNING(HW_GPU, "Condition codes implementation is incomplete");
+}
+
Node ShaderIR::BitfieldExtract(Node value, u32 offset, u32 bits) {
return Operation(OperationCode::UBitfieldExtract, NO_PRECISE, value, Immediate(offset),
Immediate(bits));