summaryrefslogtreecommitdiffstats
path: root/src/core/arm/mmu/wb.h
blob: 8fb7de9460befc53ae45fe370a2316c81c468792 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
#ifndef _MMU_WB_H_
#define _MMU_WB_H_

typedef struct wb_entry_s
{
    ARMword pa;        //phy_addr
    ARMbyte *data;        //data
    int nb;            //number byte to write
} wb_entry_t;

typedef struct wb_s
{
    int num;        //number of wb_entry
    int nb;            //number of byte of each entry
    int first;        //
    int last;        //
    int used;        //
    wb_entry_t *entrys;
} wb_s;

typedef struct wb_desc_s
{
    int num;
    int nb;
} wb_desc_t;

/* wb_init
 * @wb_t    :wb_t to init
 * @num        :num of entrys
 * @nw        :num of word of each entry
 *
 * $    -1:error
 *          0:ok
 * */
int mmu_wb_init (wb_s * wb_t, int num, int nb);


/* wb_exit
 * @wb_t :wb_t to exit
 * */
void mmu_wb_exit (wb_s * wb);


/* wb_write_bytes :put bytess in Write Buffer
 * @state:    ARMul_State
 * @wb_t:    write buffer
 * @pa:        physical address
 * @data:    data ptr
 * @n        number of byte to write
 *
 * Note: write buffer merge is not implemented, can be done late
 * */
void
mmu_wb_write_bytess (ARMul_State * state, wb_s * wb_t, ARMword pa,
             ARMbyte * data, int n);


/* wb_drain_all
 * @wb_t wb_t to drain
 * */
void mmu_wb_drain_all (ARMul_State * state, wb_s * wb_t);

#endif /*_MMU_WB_H_*/