diff options
author | bunnei <bunneidev@gmail.com> | 2018-11-24 05:31:04 +0100 |
---|---|---|
committer | GitHub <noreply@github.com> | 2018-11-24 05:31:04 +0100 |
commit | b6b78203ccbbf5e7f3306e84203448583c3394e6 (patch) | |
tree | 4d1aeceb566594e3f396bf686524b29d06b62c42 /src/video_core/engines/shader_bytecode.h | |
parent | Merge pull request #1744 from degasus/shader_cache (diff) | |
parent | gl_shader_decompiler: Add a message for unimplemented cc generation (diff) | |
download | yuzu-b6b78203ccbbf5e7f3306e84203448583c3394e6.tar yuzu-b6b78203ccbbf5e7f3306e84203448583c3394e6.tar.gz yuzu-b6b78203ccbbf5e7f3306e84203448583c3394e6.tar.bz2 yuzu-b6b78203ccbbf5e7f3306e84203448583c3394e6.tar.lz yuzu-b6b78203ccbbf5e7f3306e84203448583c3394e6.tar.xz yuzu-b6b78203ccbbf5e7f3306e84203448583c3394e6.tar.zst yuzu-b6b78203ccbbf5e7f3306e84203448583c3394e6.zip |
Diffstat (limited to 'src/video_core/engines/shader_bytecode.h')
-rw-r--r-- | src/video_core/engines/shader_bytecode.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index c5f502ce1..7e8449bc4 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -262,7 +262,7 @@ enum class FlowCondition : u64 { Fcsm_Tr = 0x1C, // TODO(bunnei): What is this used for? }; -enum class ControlCode : u64 { +enum class ConditionCode : u64 { F = 0, LT = 1, EQ = 2, @@ -570,7 +570,6 @@ union Instruction { BitField<39, 2, u64> tab5cb8_2; BitField<41, 3, u64> tab5c68_1; BitField<44, 2, u64> tab5c68_0; - BitField<47, 1, u64> cc; BitField<48, 1, u64> negate_b; } fmul; @@ -832,7 +831,7 @@ union Instruction { union { BitField<0, 3, u64> pred0; BitField<3, 3, u64> pred3; - BitField<8, 5, ControlCode> cc; // flag in cc + BitField<8, 5, ConditionCode> cc; // flag in cc BitField<39, 3, u64> pred39; BitField<42, 1, u64> neg_pred39; BitField<45, 4, PredOperation> op; // op with pred39 @@ -1236,7 +1235,7 @@ union Instruction { BitField<60, 1, u64> is_b_gpr; BitField<59, 1, u64> is_c_gpr; BitField<20, 24, s64> smem_imm; - BitField<0, 5, ControlCode> flow_control_code; + BitField<0, 5, ConditionCode> flow_condition_code; Attribute attribute; Sampler sampler; |